1// Generated by opcode_generator.rb from /home/user/data/webkitgtk-2.25.2/Source/JavaScriptCore/b3/air/AirOpcode.opcodes -- do not edit!
2#ifndef AirOpcodeUtils_h
3#define AirOpcodeUtils_h
4#include "AirCustom.h"
5#include "AirInst.h"
6#include "AirFormTable.h"
7namespace JSC { namespace B3 { namespace Air {
8inline bool opgenHiddenTruth() { return true; }
9template<typename T>
10inline T* opgenHiddenPtrIdentity(T* pointer) { return pointer; }
11#define OPGEN_RETURN(value) do {\
12 if (opgenHiddenTruth())\
13 return value;\
14} while (false)
15template<typename Functor>
16ALWAYS_INLINE void Inst::forEachArg(const Functor& functor)
17{
18switch (kind.opcode) {
19case Opcode::EntrySwitch:
20case Opcode::Shuffle:
21case Opcode::Patch:
22case Opcode::CCall:
23case Opcode::ColdCCall:
24case Opcode::WasmBoundsCheck:
25forEachArgCustom(scopedLambdaRef<EachArgCallback>(functor));
26return;
27default:
28forEachArgSimple(functor);
29return;
30}
31}
32template<typename Func>
33ALWAYS_INLINE void Inst::forEachArgSimple(const Func& func)
34{
35 size_t numOperands = args.size();
36 size_t formOffset = (numOperands - 1) * numOperands / 2;
37 const uint8_t* formBase = g_formTable + kind.opcode * 21 + formOffset;
38 for (size_t i = 0; i < numOperands; ++i) {
39 uint8_t form = formBase[i];
40 ASSERT(!(form & (1 << formInvalidShift)));
41 func(args[i], decodeFormRole(form), decodeFormBank(form), decodeFormWidth(form));
42 }
43}
44template<typename... Arguments>
45ALWAYS_INLINE bool isValidForm(Opcode opcode, Arguments... arguments)
46{
47Arg::Kind kinds[sizeof...(Arguments)] = { arguments... };
48switch (opcode) {
49case Opcode::Nop:
50switch (sizeof...(Arguments)) {
51case 0:
52OPGEN_RETURN(true);
53break;
54break;
55default:
56break;
57}
58break;
59case Opcode::Add32:
60switch (sizeof...(Arguments)) {
61case 3:
62switch (opgenHiddenPtrIdentity(kinds)[0]) {
63case Arg::Imm:
64switch (opgenHiddenPtrIdentity(kinds)[1]) {
65case Arg::Tmp:
66switch (opgenHiddenPtrIdentity(kinds)[2]) {
67case Arg::Tmp:
68OPGEN_RETURN(true);
69break;
70break;
71default:
72break;
73}
74break;
75default:
76break;
77}
78break;
79case Arg::Tmp:
80switch (opgenHiddenPtrIdentity(kinds)[1]) {
81case Arg::Tmp:
82switch (opgenHiddenPtrIdentity(kinds)[2]) {
83case Arg::Tmp:
84OPGEN_RETURN(true);
85break;
86break;
87default:
88break;
89}
90break;
91default:
92break;
93}
94break;
95default:
96break;
97}
98break;
99case 2:
100switch (opgenHiddenPtrIdentity(kinds)[0]) {
101case Arg::Tmp:
102switch (opgenHiddenPtrIdentity(kinds)[1]) {
103case Arg::Tmp:
104OPGEN_RETURN(true);
105break;
106break;
107case Arg::Addr:
108case Arg::Stack:
109case Arg::CallArg:
110#if CPU(X86) || CPU(X86_64)
111OPGEN_RETURN(true);
112#endif
113break;
114break;
115case Arg::Index:
116#if CPU(X86) || CPU(X86_64)
117OPGEN_RETURN(true);
118#endif
119break;
120break;
121default:
122break;
123}
124break;
125case Arg::Imm:
126switch (opgenHiddenPtrIdentity(kinds)[1]) {
127case Arg::Addr:
128case Arg::Stack:
129case Arg::CallArg:
130#if CPU(X86) || CPU(X86_64)
131OPGEN_RETURN(true);
132#endif
133break;
134break;
135case Arg::Index:
136#if CPU(X86) || CPU(X86_64)
137OPGEN_RETURN(true);
138#endif
139break;
140break;
141case Arg::Tmp:
142OPGEN_RETURN(true);
143break;
144break;
145default:
146break;
147}
148break;
149case Arg::Addr:
150case Arg::Stack:
151case Arg::CallArg:
152switch (opgenHiddenPtrIdentity(kinds)[1]) {
153case Arg::Tmp:
154#if CPU(X86) || CPU(X86_64)
155OPGEN_RETURN(true);
156#endif
157break;
158break;
159default:
160break;
161}
162break;
163case Arg::Index:
164switch (opgenHiddenPtrIdentity(kinds)[1]) {
165case Arg::Tmp:
166#if CPU(X86) || CPU(X86_64)
167OPGEN_RETURN(true);
168#endif
169break;
170break;
171default:
172break;
173}
174break;
175default:
176break;
177}
178break;
179default:
180break;
181}
182break;
183case Opcode::Add8:
184switch (sizeof...(Arguments)) {
185case 2:
186switch (opgenHiddenPtrIdentity(kinds)[0]) {
187case Arg::Imm:
188switch (opgenHiddenPtrIdentity(kinds)[1]) {
189case Arg::Addr:
190case Arg::Stack:
191case Arg::CallArg:
192#if CPU(X86) || CPU(X86_64)
193OPGEN_RETURN(true);
194#endif
195break;
196break;
197case Arg::Index:
198#if CPU(X86) || CPU(X86_64)
199OPGEN_RETURN(true);
200#endif
201break;
202break;
203default:
204break;
205}
206break;
207case Arg::Tmp:
208switch (opgenHiddenPtrIdentity(kinds)[1]) {
209case Arg::Addr:
210case Arg::Stack:
211case Arg::CallArg:
212#if CPU(X86) || CPU(X86_64)
213OPGEN_RETURN(true);
214#endif
215break;
216break;
217case Arg::Index:
218#if CPU(X86) || CPU(X86_64)
219OPGEN_RETURN(true);
220#endif
221break;
222break;
223default:
224break;
225}
226break;
227default:
228break;
229}
230break;
231default:
232break;
233}
234break;
235case Opcode::Add16:
236switch (sizeof...(Arguments)) {
237case 2:
238switch (opgenHiddenPtrIdentity(kinds)[0]) {
239case Arg::Imm:
240switch (opgenHiddenPtrIdentity(kinds)[1]) {
241case Arg::Addr:
242case Arg::Stack:
243case Arg::CallArg:
244#if CPU(X86) || CPU(X86_64)
245OPGEN_RETURN(true);
246#endif
247break;
248break;
249case Arg::Index:
250#if CPU(X86) || CPU(X86_64)
251OPGEN_RETURN(true);
252#endif
253break;
254break;
255default:
256break;
257}
258break;
259case Arg::Tmp:
260switch (opgenHiddenPtrIdentity(kinds)[1]) {
261case Arg::Addr:
262case Arg::Stack:
263case Arg::CallArg:
264#if CPU(X86) || CPU(X86_64)
265OPGEN_RETURN(true);
266#endif
267break;
268break;
269case Arg::Index:
270#if CPU(X86) || CPU(X86_64)
271OPGEN_RETURN(true);
272#endif
273break;
274break;
275default:
276break;
277}
278break;
279default:
280break;
281}
282break;
283default:
284break;
285}
286break;
287case Opcode::Add64:
288switch (sizeof...(Arguments)) {
289case 2:
290switch (opgenHiddenPtrIdentity(kinds)[0]) {
291case Arg::Tmp:
292switch (opgenHiddenPtrIdentity(kinds)[1]) {
293case Arg::Tmp:
294#if CPU(X86_64) || CPU(ARM64)
295OPGEN_RETURN(true);
296#endif
297break;
298break;
299case Arg::Addr:
300case Arg::Stack:
301case Arg::CallArg:
302#if CPU(X86_64)
303OPGEN_RETURN(true);
304#endif
305break;
306break;
307case Arg::Index:
308#if CPU(X86_64)
309OPGEN_RETURN(true);
310#endif
311break;
312break;
313default:
314break;
315}
316break;
317case Arg::Imm:
318switch (opgenHiddenPtrIdentity(kinds)[1]) {
319case Arg::Addr:
320case Arg::Stack:
321case Arg::CallArg:
322#if CPU(X86_64)
323OPGEN_RETURN(true);
324#endif
325break;
326break;
327case Arg::Index:
328#if CPU(X86_64)
329OPGEN_RETURN(true);
330#endif
331break;
332break;
333case Arg::Tmp:
334#if CPU(X86_64) || CPU(ARM64)
335OPGEN_RETURN(true);
336#endif
337break;
338break;
339default:
340break;
341}
342break;
343case Arg::Addr:
344case Arg::Stack:
345case Arg::CallArg:
346switch (opgenHiddenPtrIdentity(kinds)[1]) {
347case Arg::Tmp:
348#if CPU(X86_64)
349OPGEN_RETURN(true);
350#endif
351break;
352break;
353default:
354break;
355}
356break;
357case Arg::Index:
358switch (opgenHiddenPtrIdentity(kinds)[1]) {
359case Arg::Tmp:
360#if CPU(X86_64)
361OPGEN_RETURN(true);
362#endif
363break;
364break;
365default:
366break;
367}
368break;
369default:
370break;
371}
372break;
373case 3:
374switch (opgenHiddenPtrIdentity(kinds)[0]) {
375case Arg::Imm:
376switch (opgenHiddenPtrIdentity(kinds)[1]) {
377case Arg::Tmp:
378switch (opgenHiddenPtrIdentity(kinds)[2]) {
379case Arg::Tmp:
380#if CPU(X86_64) || CPU(ARM64)
381OPGEN_RETURN(true);
382#endif
383break;
384break;
385default:
386break;
387}
388break;
389default:
390break;
391}
392break;
393case Arg::Tmp:
394switch (opgenHiddenPtrIdentity(kinds)[1]) {
395case Arg::Tmp:
396switch (opgenHiddenPtrIdentity(kinds)[2]) {
397case Arg::Tmp:
398#if CPU(X86_64) || CPU(ARM64)
399OPGEN_RETURN(true);
400#endif
401break;
402break;
403default:
404break;
405}
406break;
407default:
408break;
409}
410break;
411default:
412break;
413}
414break;
415default:
416break;
417}
418break;
419case Opcode::AddDouble:
420switch (sizeof...(Arguments)) {
421case 3:
422switch (opgenHiddenPtrIdentity(kinds)[0]) {
423case Arg::Tmp:
424switch (opgenHiddenPtrIdentity(kinds)[1]) {
425case Arg::Tmp:
426switch (opgenHiddenPtrIdentity(kinds)[2]) {
427case Arg::Tmp:
428OPGEN_RETURN(true);
429break;
430break;
431default:
432break;
433}
434break;
435case Arg::Addr:
436case Arg::Stack:
437case Arg::CallArg:
438switch (opgenHiddenPtrIdentity(kinds)[2]) {
439case Arg::Tmp:
440#if CPU(X86) || CPU(X86_64)
441OPGEN_RETURN(true);
442#endif
443break;
444break;
445default:
446break;
447}
448break;
449default:
450break;
451}
452break;
453case Arg::Addr:
454case Arg::Stack:
455case Arg::CallArg:
456switch (opgenHiddenPtrIdentity(kinds)[1]) {
457case Arg::Tmp:
458switch (opgenHiddenPtrIdentity(kinds)[2]) {
459case Arg::Tmp:
460#if CPU(X86) || CPU(X86_64)
461OPGEN_RETURN(true);
462#endif
463break;
464break;
465default:
466break;
467}
468break;
469default:
470break;
471}
472break;
473case Arg::Index:
474switch (opgenHiddenPtrIdentity(kinds)[1]) {
475case Arg::Tmp:
476switch (opgenHiddenPtrIdentity(kinds)[2]) {
477case Arg::Tmp:
478#if CPU(X86) || CPU(X86_64)
479OPGEN_RETURN(true);
480#endif
481break;
482break;
483default:
484break;
485}
486break;
487default:
488break;
489}
490break;
491default:
492break;
493}
494break;
495case 2:
496switch (opgenHiddenPtrIdentity(kinds)[0]) {
497case Arg::Tmp:
498switch (opgenHiddenPtrIdentity(kinds)[1]) {
499case Arg::Tmp:
500#if CPU(X86) || CPU(X86_64)
501OPGEN_RETURN(true);
502#endif
503break;
504break;
505default:
506break;
507}
508break;
509case Arg::Addr:
510case Arg::Stack:
511case Arg::CallArg:
512switch (opgenHiddenPtrIdentity(kinds)[1]) {
513case Arg::Tmp:
514#if CPU(X86) || CPU(X86_64)
515OPGEN_RETURN(true);
516#endif
517break;
518break;
519default:
520break;
521}
522break;
523default:
524break;
525}
526break;
527default:
528break;
529}
530break;
531case Opcode::AddFloat:
532switch (sizeof...(Arguments)) {
533case 3:
534switch (opgenHiddenPtrIdentity(kinds)[0]) {
535case Arg::Tmp:
536switch (opgenHiddenPtrIdentity(kinds)[1]) {
537case Arg::Tmp:
538switch (opgenHiddenPtrIdentity(kinds)[2]) {
539case Arg::Tmp:
540OPGEN_RETURN(true);
541break;
542break;
543default:
544break;
545}
546break;
547case Arg::Addr:
548case Arg::Stack:
549case Arg::CallArg:
550switch (opgenHiddenPtrIdentity(kinds)[2]) {
551case Arg::Tmp:
552#if CPU(X86) || CPU(X86_64)
553OPGEN_RETURN(true);
554#endif
555break;
556break;
557default:
558break;
559}
560break;
561default:
562break;
563}
564break;
565case Arg::Addr:
566case Arg::Stack:
567case Arg::CallArg:
568switch (opgenHiddenPtrIdentity(kinds)[1]) {
569case Arg::Tmp:
570switch (opgenHiddenPtrIdentity(kinds)[2]) {
571case Arg::Tmp:
572#if CPU(X86) || CPU(X86_64)
573OPGEN_RETURN(true);
574#endif
575break;
576break;
577default:
578break;
579}
580break;
581default:
582break;
583}
584break;
585case Arg::Index:
586switch (opgenHiddenPtrIdentity(kinds)[1]) {
587case Arg::Tmp:
588switch (opgenHiddenPtrIdentity(kinds)[2]) {
589case Arg::Tmp:
590#if CPU(X86) || CPU(X86_64)
591OPGEN_RETURN(true);
592#endif
593break;
594break;
595default:
596break;
597}
598break;
599default:
600break;
601}
602break;
603default:
604break;
605}
606break;
607case 2:
608switch (opgenHiddenPtrIdentity(kinds)[0]) {
609case Arg::Tmp:
610switch (opgenHiddenPtrIdentity(kinds)[1]) {
611case Arg::Tmp:
612#if CPU(X86) || CPU(X86_64)
613OPGEN_RETURN(true);
614#endif
615break;
616break;
617default:
618break;
619}
620break;
621case Arg::Addr:
622case Arg::Stack:
623case Arg::CallArg:
624switch (opgenHiddenPtrIdentity(kinds)[1]) {
625case Arg::Tmp:
626#if CPU(X86) || CPU(X86_64)
627OPGEN_RETURN(true);
628#endif
629break;
630break;
631default:
632break;
633}
634break;
635default:
636break;
637}
638break;
639default:
640break;
641}
642break;
643case Opcode::Sub32:
644switch (sizeof...(Arguments)) {
645case 2:
646switch (opgenHiddenPtrIdentity(kinds)[0]) {
647case Arg::Tmp:
648switch (opgenHiddenPtrIdentity(kinds)[1]) {
649case Arg::Tmp:
650OPGEN_RETURN(true);
651break;
652break;
653case Arg::Addr:
654case Arg::Stack:
655case Arg::CallArg:
656#if CPU(X86) || CPU(X86_64)
657OPGEN_RETURN(true);
658#endif
659break;
660break;
661case Arg::Index:
662#if CPU(X86) || CPU(X86_64)
663OPGEN_RETURN(true);
664#endif
665break;
666break;
667default:
668break;
669}
670break;
671case Arg::Imm:
672switch (opgenHiddenPtrIdentity(kinds)[1]) {
673case Arg::Addr:
674case Arg::Stack:
675case Arg::CallArg:
676#if CPU(X86) || CPU(X86_64)
677OPGEN_RETURN(true);
678#endif
679break;
680break;
681case Arg::Index:
682#if CPU(X86) || CPU(X86_64)
683OPGEN_RETURN(true);
684#endif
685break;
686break;
687case Arg::Tmp:
688OPGEN_RETURN(true);
689break;
690break;
691default:
692break;
693}
694break;
695case Arg::Addr:
696case Arg::Stack:
697case Arg::CallArg:
698switch (opgenHiddenPtrIdentity(kinds)[1]) {
699case Arg::Tmp:
700#if CPU(X86) || CPU(X86_64)
701OPGEN_RETURN(true);
702#endif
703break;
704break;
705default:
706break;
707}
708break;
709case Arg::Index:
710switch (opgenHiddenPtrIdentity(kinds)[1]) {
711case Arg::Tmp:
712#if CPU(X86) || CPU(X86_64)
713OPGEN_RETURN(true);
714#endif
715break;
716break;
717default:
718break;
719}
720break;
721default:
722break;
723}
724break;
725case 3:
726switch (opgenHiddenPtrIdentity(kinds)[0]) {
727case Arg::Tmp:
728switch (opgenHiddenPtrIdentity(kinds)[1]) {
729case Arg::Tmp:
730switch (opgenHiddenPtrIdentity(kinds)[2]) {
731case Arg::Tmp:
732#if CPU(ARM64)
733OPGEN_RETURN(true);
734#endif
735break;
736break;
737default:
738break;
739}
740break;
741default:
742break;
743}
744break;
745default:
746break;
747}
748break;
749default:
750break;
751}
752break;
753case Opcode::Sub64:
754switch (sizeof...(Arguments)) {
755case 2:
756switch (opgenHiddenPtrIdentity(kinds)[0]) {
757case Arg::Tmp:
758switch (opgenHiddenPtrIdentity(kinds)[1]) {
759case Arg::Tmp:
760#if CPU(X86_64) || CPU(ARM64)
761OPGEN_RETURN(true);
762#endif
763break;
764break;
765case Arg::Addr:
766case Arg::Stack:
767case Arg::CallArg:
768#if CPU(X86_64)
769OPGEN_RETURN(true);
770#endif
771break;
772break;
773case Arg::Index:
774#if CPU(X86_64)
775OPGEN_RETURN(true);
776#endif
777break;
778break;
779default:
780break;
781}
782break;
783case Arg::Imm:
784switch (opgenHiddenPtrIdentity(kinds)[1]) {
785case Arg::Addr:
786case Arg::Stack:
787case Arg::CallArg:
788#if CPU(X86_64)
789OPGEN_RETURN(true);
790#endif
791break;
792break;
793case Arg::Index:
794#if CPU(X86_64)
795OPGEN_RETURN(true);
796#endif
797break;
798break;
799case Arg::Tmp:
800#if CPU(X86_64) || CPU(ARM64)
801OPGEN_RETURN(true);
802#endif
803break;
804break;
805default:
806break;
807}
808break;
809case Arg::Addr:
810case Arg::Stack:
811case Arg::CallArg:
812switch (opgenHiddenPtrIdentity(kinds)[1]) {
813case Arg::Tmp:
814#if CPU(X86_64)
815OPGEN_RETURN(true);
816#endif
817break;
818break;
819default:
820break;
821}
822break;
823case Arg::Index:
824switch (opgenHiddenPtrIdentity(kinds)[1]) {
825case Arg::Tmp:
826#if CPU(X86_64)
827OPGEN_RETURN(true);
828#endif
829break;
830break;
831default:
832break;
833}
834break;
835default:
836break;
837}
838break;
839case 3:
840switch (opgenHiddenPtrIdentity(kinds)[0]) {
841case Arg::Tmp:
842switch (opgenHiddenPtrIdentity(kinds)[1]) {
843case Arg::Tmp:
844switch (opgenHiddenPtrIdentity(kinds)[2]) {
845case Arg::Tmp:
846#if CPU(ARM64)
847OPGEN_RETURN(true);
848#endif
849break;
850break;
851default:
852break;
853}
854break;
855default:
856break;
857}
858break;
859default:
860break;
861}
862break;
863default:
864break;
865}
866break;
867case Opcode::SubDouble:
868switch (sizeof...(Arguments)) {
869case 3:
870switch (opgenHiddenPtrIdentity(kinds)[0]) {
871case Arg::Tmp:
872switch (opgenHiddenPtrIdentity(kinds)[1]) {
873case Arg::Tmp:
874switch (opgenHiddenPtrIdentity(kinds)[2]) {
875case Arg::Tmp:
876#if CPU(ARM64)
877OPGEN_RETURN(true);
878#endif
879break;
880break;
881default:
882break;
883}
884break;
885case Arg::Addr:
886case Arg::Stack:
887case Arg::CallArg:
888switch (opgenHiddenPtrIdentity(kinds)[2]) {
889case Arg::Tmp:
890#if CPU(X86) || CPU(X86_64)
891OPGEN_RETURN(true);
892#endif
893break;
894break;
895default:
896break;
897}
898break;
899case Arg::Index:
900switch (opgenHiddenPtrIdentity(kinds)[2]) {
901case Arg::Tmp:
902#if CPU(X86) || CPU(X86_64)
903OPGEN_RETURN(true);
904#endif
905break;
906break;
907default:
908break;
909}
910break;
911default:
912break;
913}
914break;
915default:
916break;
917}
918break;
919case 2:
920switch (opgenHiddenPtrIdentity(kinds)[0]) {
921case Arg::Tmp:
922switch (opgenHiddenPtrIdentity(kinds)[1]) {
923case Arg::Tmp:
924#if CPU(X86) || CPU(X86_64)
925OPGEN_RETURN(true);
926#endif
927break;
928break;
929default:
930break;
931}
932break;
933case Arg::Addr:
934case Arg::Stack:
935case Arg::CallArg:
936switch (opgenHiddenPtrIdentity(kinds)[1]) {
937case Arg::Tmp:
938#if CPU(X86) || CPU(X86_64)
939OPGEN_RETURN(true);
940#endif
941break;
942break;
943default:
944break;
945}
946break;
947default:
948break;
949}
950break;
951default:
952break;
953}
954break;
955case Opcode::SubFloat:
956switch (sizeof...(Arguments)) {
957case 3:
958switch (opgenHiddenPtrIdentity(kinds)[0]) {
959case Arg::Tmp:
960switch (opgenHiddenPtrIdentity(kinds)[1]) {
961case Arg::Tmp:
962switch (opgenHiddenPtrIdentity(kinds)[2]) {
963case Arg::Tmp:
964#if CPU(ARM64)
965OPGEN_RETURN(true);
966#endif
967break;
968break;
969default:
970break;
971}
972break;
973case Arg::Addr:
974case Arg::Stack:
975case Arg::CallArg:
976switch (opgenHiddenPtrIdentity(kinds)[2]) {
977case Arg::Tmp:
978#if CPU(X86) || CPU(X86_64)
979OPGEN_RETURN(true);
980#endif
981break;
982break;
983default:
984break;
985}
986break;
987case Arg::Index:
988switch (opgenHiddenPtrIdentity(kinds)[2]) {
989case Arg::Tmp:
990#if CPU(X86) || CPU(X86_64)
991OPGEN_RETURN(true);
992#endif
993break;
994break;
995default:
996break;
997}
998break;
999default:
1000break;
1001}
1002break;
1003default:
1004break;
1005}
1006break;
1007case 2:
1008switch (opgenHiddenPtrIdentity(kinds)[0]) {
1009case Arg::Tmp:
1010switch (opgenHiddenPtrIdentity(kinds)[1]) {
1011case Arg::Tmp:
1012#if CPU(X86) || CPU(X86_64)
1013OPGEN_RETURN(true);
1014#endif
1015break;
1016break;
1017default:
1018break;
1019}
1020break;
1021case Arg::Addr:
1022case Arg::Stack:
1023case Arg::CallArg:
1024switch (opgenHiddenPtrIdentity(kinds)[1]) {
1025case Arg::Tmp:
1026#if CPU(X86) || CPU(X86_64)
1027OPGEN_RETURN(true);
1028#endif
1029break;
1030break;
1031default:
1032break;
1033}
1034break;
1035default:
1036break;
1037}
1038break;
1039default:
1040break;
1041}
1042break;
1043case Opcode::Neg32:
1044switch (sizeof...(Arguments)) {
1045case 1:
1046switch (opgenHiddenPtrIdentity(kinds)[0]) {
1047case Arg::Tmp:
1048OPGEN_RETURN(true);
1049break;
1050break;
1051case Arg::Addr:
1052case Arg::Stack:
1053case Arg::CallArg:
1054#if CPU(X86) || CPU(X86_64)
1055OPGEN_RETURN(true);
1056#endif
1057break;
1058break;
1059case Arg::Index:
1060#if CPU(X86) || CPU(X86_64)
1061OPGEN_RETURN(true);
1062#endif
1063break;
1064break;
1065default:
1066break;
1067}
1068break;
1069default:
1070break;
1071}
1072break;
1073case Opcode::Neg64:
1074switch (sizeof...(Arguments)) {
1075case 1:
1076switch (opgenHiddenPtrIdentity(kinds)[0]) {
1077case Arg::Tmp:
1078#if CPU(X86_64) || CPU(ARM64)
1079OPGEN_RETURN(true);
1080#endif
1081break;
1082break;
1083case Arg::Addr:
1084case Arg::Stack:
1085case Arg::CallArg:
1086#if CPU(X86_64)
1087OPGEN_RETURN(true);
1088#endif
1089break;
1090break;
1091case Arg::Index:
1092#if CPU(X86_64)
1093OPGEN_RETURN(true);
1094#endif
1095break;
1096break;
1097default:
1098break;
1099}
1100break;
1101default:
1102break;
1103}
1104break;
1105case Opcode::NegateDouble:
1106switch (sizeof...(Arguments)) {
1107case 2:
1108switch (opgenHiddenPtrIdentity(kinds)[0]) {
1109case Arg::Tmp:
1110switch (opgenHiddenPtrIdentity(kinds)[1]) {
1111case Arg::Tmp:
1112#if CPU(ARM64)
1113OPGEN_RETURN(true);
1114#endif
1115break;
1116break;
1117default:
1118break;
1119}
1120break;
1121default:
1122break;
1123}
1124break;
1125default:
1126break;
1127}
1128break;
1129case Opcode::NegateFloat:
1130switch (sizeof...(Arguments)) {
1131case 2:
1132switch (opgenHiddenPtrIdentity(kinds)[0]) {
1133case Arg::Tmp:
1134switch (opgenHiddenPtrIdentity(kinds)[1]) {
1135case Arg::Tmp:
1136#if CPU(ARM64)
1137OPGEN_RETURN(true);
1138#endif
1139break;
1140break;
1141default:
1142break;
1143}
1144break;
1145default:
1146break;
1147}
1148break;
1149default:
1150break;
1151}
1152break;
1153case Opcode::Mul32:
1154switch (sizeof...(Arguments)) {
1155case 2:
1156switch (opgenHiddenPtrIdentity(kinds)[0]) {
1157case Arg::Tmp:
1158switch (opgenHiddenPtrIdentity(kinds)[1]) {
1159case Arg::Tmp:
1160OPGEN_RETURN(true);
1161break;
1162break;
1163default:
1164break;
1165}
1166break;
1167case Arg::Addr:
1168case Arg::Stack:
1169case Arg::CallArg:
1170switch (opgenHiddenPtrIdentity(kinds)[1]) {
1171case Arg::Tmp:
1172#if CPU(X86) || CPU(X86_64)
1173OPGEN_RETURN(true);
1174#endif
1175break;
1176break;
1177default:
1178break;
1179}
1180break;
1181default:
1182break;
1183}
1184break;
1185case 3:
1186switch (opgenHiddenPtrIdentity(kinds)[0]) {
1187case Arg::Tmp:
1188switch (opgenHiddenPtrIdentity(kinds)[1]) {
1189case Arg::Tmp:
1190switch (opgenHiddenPtrIdentity(kinds)[2]) {
1191case Arg::Tmp:
1192OPGEN_RETURN(true);
1193break;
1194break;
1195default:
1196break;
1197}
1198break;
1199case Arg::Addr:
1200case Arg::Stack:
1201case Arg::CallArg:
1202switch (opgenHiddenPtrIdentity(kinds)[2]) {
1203case Arg::Tmp:
1204#if CPU(X86) || CPU(X86_64)
1205OPGEN_RETURN(true);
1206#endif
1207break;
1208break;
1209default:
1210break;
1211}
1212break;
1213default:
1214break;
1215}
1216break;
1217case Arg::Addr:
1218case Arg::Stack:
1219case Arg::CallArg:
1220switch (opgenHiddenPtrIdentity(kinds)[1]) {
1221case Arg::Tmp:
1222switch (opgenHiddenPtrIdentity(kinds)[2]) {
1223case Arg::Tmp:
1224#if CPU(X86) || CPU(X86_64)
1225OPGEN_RETURN(true);
1226#endif
1227break;
1228break;
1229default:
1230break;
1231}
1232break;
1233default:
1234break;
1235}
1236break;
1237case Arg::Imm:
1238switch (opgenHiddenPtrIdentity(kinds)[1]) {
1239case Arg::Tmp:
1240switch (opgenHiddenPtrIdentity(kinds)[2]) {
1241case Arg::Tmp:
1242#if CPU(X86) || CPU(X86_64)
1243OPGEN_RETURN(true);
1244#endif
1245break;
1246break;
1247default:
1248break;
1249}
1250break;
1251default:
1252break;
1253}
1254break;
1255default:
1256break;
1257}
1258break;
1259default:
1260break;
1261}
1262break;
1263case Opcode::Mul64:
1264switch (sizeof...(Arguments)) {
1265case 2:
1266switch (opgenHiddenPtrIdentity(kinds)[0]) {
1267case Arg::Tmp:
1268switch (opgenHiddenPtrIdentity(kinds)[1]) {
1269case Arg::Tmp:
1270#if CPU(X86_64) || CPU(ARM64)
1271OPGEN_RETURN(true);
1272#endif
1273break;
1274break;
1275default:
1276break;
1277}
1278break;
1279default:
1280break;
1281}
1282break;
1283case 3:
1284switch (opgenHiddenPtrIdentity(kinds)[0]) {
1285case Arg::Tmp:
1286switch (opgenHiddenPtrIdentity(kinds)[1]) {
1287case Arg::Tmp:
1288switch (opgenHiddenPtrIdentity(kinds)[2]) {
1289case Arg::Tmp:
1290OPGEN_RETURN(true);
1291break;
1292break;
1293default:
1294break;
1295}
1296break;
1297default:
1298break;
1299}
1300break;
1301default:
1302break;
1303}
1304break;
1305default:
1306break;
1307}
1308break;
1309case Opcode::MultiplyAdd32:
1310switch (sizeof...(Arguments)) {
1311case 4:
1312switch (opgenHiddenPtrIdentity(kinds)[0]) {
1313case Arg::Tmp:
1314switch (opgenHiddenPtrIdentity(kinds)[1]) {
1315case Arg::Tmp:
1316switch (opgenHiddenPtrIdentity(kinds)[2]) {
1317case Arg::Tmp:
1318switch (opgenHiddenPtrIdentity(kinds)[3]) {
1319case Arg::Tmp:
1320#if CPU(ARM64)
1321OPGEN_RETURN(true);
1322#endif
1323break;
1324break;
1325default:
1326break;
1327}
1328break;
1329default:
1330break;
1331}
1332break;
1333default:
1334break;
1335}
1336break;
1337default:
1338break;
1339}
1340break;
1341default:
1342break;
1343}
1344break;
1345case Opcode::MultiplyAdd64:
1346switch (sizeof...(Arguments)) {
1347case 4:
1348switch (opgenHiddenPtrIdentity(kinds)[0]) {
1349case Arg::Tmp:
1350switch (opgenHiddenPtrIdentity(kinds)[1]) {
1351case Arg::Tmp:
1352switch (opgenHiddenPtrIdentity(kinds)[2]) {
1353case Arg::Tmp:
1354switch (opgenHiddenPtrIdentity(kinds)[3]) {
1355case Arg::Tmp:
1356#if CPU(ARM64)
1357OPGEN_RETURN(true);
1358#endif
1359break;
1360break;
1361default:
1362break;
1363}
1364break;
1365default:
1366break;
1367}
1368break;
1369default:
1370break;
1371}
1372break;
1373default:
1374break;
1375}
1376break;
1377default:
1378break;
1379}
1380break;
1381case Opcode::MultiplySub32:
1382switch (sizeof...(Arguments)) {
1383case 4:
1384switch (opgenHiddenPtrIdentity(kinds)[0]) {
1385case Arg::Tmp:
1386switch (opgenHiddenPtrIdentity(kinds)[1]) {
1387case Arg::Tmp:
1388switch (opgenHiddenPtrIdentity(kinds)[2]) {
1389case Arg::Tmp:
1390switch (opgenHiddenPtrIdentity(kinds)[3]) {
1391case Arg::Tmp:
1392#if CPU(ARM64)
1393OPGEN_RETURN(true);
1394#endif
1395break;
1396break;
1397default:
1398break;
1399}
1400break;
1401default:
1402break;
1403}
1404break;
1405default:
1406break;
1407}
1408break;
1409default:
1410break;
1411}
1412break;
1413default:
1414break;
1415}
1416break;
1417case Opcode::MultiplySub64:
1418switch (sizeof...(Arguments)) {
1419case 4:
1420switch (opgenHiddenPtrIdentity(kinds)[0]) {
1421case Arg::Tmp:
1422switch (opgenHiddenPtrIdentity(kinds)[1]) {
1423case Arg::Tmp:
1424switch (opgenHiddenPtrIdentity(kinds)[2]) {
1425case Arg::Tmp:
1426switch (opgenHiddenPtrIdentity(kinds)[3]) {
1427case Arg::Tmp:
1428#if CPU(ARM64)
1429OPGEN_RETURN(true);
1430#endif
1431break;
1432break;
1433default:
1434break;
1435}
1436break;
1437default:
1438break;
1439}
1440break;
1441default:
1442break;
1443}
1444break;
1445default:
1446break;
1447}
1448break;
1449default:
1450break;
1451}
1452break;
1453case Opcode::MultiplyNeg32:
1454switch (sizeof...(Arguments)) {
1455case 3:
1456switch (opgenHiddenPtrIdentity(kinds)[0]) {
1457case Arg::Tmp:
1458switch (opgenHiddenPtrIdentity(kinds)[1]) {
1459case Arg::Tmp:
1460switch (opgenHiddenPtrIdentity(kinds)[2]) {
1461case Arg::Tmp:
1462#if CPU(ARM64)
1463OPGEN_RETURN(true);
1464#endif
1465break;
1466break;
1467default:
1468break;
1469}
1470break;
1471default:
1472break;
1473}
1474break;
1475default:
1476break;
1477}
1478break;
1479default:
1480break;
1481}
1482break;
1483case Opcode::MultiplyNeg64:
1484switch (sizeof...(Arguments)) {
1485case 3:
1486switch (opgenHiddenPtrIdentity(kinds)[0]) {
1487case Arg::Tmp:
1488switch (opgenHiddenPtrIdentity(kinds)[1]) {
1489case Arg::Tmp:
1490switch (opgenHiddenPtrIdentity(kinds)[2]) {
1491case Arg::Tmp:
1492#if CPU(ARM64)
1493OPGEN_RETURN(true);
1494#endif
1495break;
1496break;
1497default:
1498break;
1499}
1500break;
1501default:
1502break;
1503}
1504break;
1505default:
1506break;
1507}
1508break;
1509default:
1510break;
1511}
1512break;
1513case Opcode::Div32:
1514switch (sizeof...(Arguments)) {
1515case 3:
1516switch (opgenHiddenPtrIdentity(kinds)[0]) {
1517case Arg::Tmp:
1518switch (opgenHiddenPtrIdentity(kinds)[1]) {
1519case Arg::Tmp:
1520switch (opgenHiddenPtrIdentity(kinds)[2]) {
1521case Arg::Tmp:
1522#if CPU(ARM64)
1523OPGEN_RETURN(true);
1524#endif
1525break;
1526break;
1527default:
1528break;
1529}
1530break;
1531default:
1532break;
1533}
1534break;
1535default:
1536break;
1537}
1538break;
1539default:
1540break;
1541}
1542break;
1543case Opcode::UDiv32:
1544switch (sizeof...(Arguments)) {
1545case 3:
1546switch (opgenHiddenPtrIdentity(kinds)[0]) {
1547case Arg::Tmp:
1548switch (opgenHiddenPtrIdentity(kinds)[1]) {
1549case Arg::Tmp:
1550switch (opgenHiddenPtrIdentity(kinds)[2]) {
1551case Arg::Tmp:
1552#if CPU(ARM64)
1553OPGEN_RETURN(true);
1554#endif
1555break;
1556break;
1557default:
1558break;
1559}
1560break;
1561default:
1562break;
1563}
1564break;
1565default:
1566break;
1567}
1568break;
1569default:
1570break;
1571}
1572break;
1573case Opcode::Div64:
1574switch (sizeof...(Arguments)) {
1575case 3:
1576switch (opgenHiddenPtrIdentity(kinds)[0]) {
1577case Arg::Tmp:
1578switch (opgenHiddenPtrIdentity(kinds)[1]) {
1579case Arg::Tmp:
1580switch (opgenHiddenPtrIdentity(kinds)[2]) {
1581case Arg::Tmp:
1582#if CPU(ARM64)
1583OPGEN_RETURN(true);
1584#endif
1585break;
1586break;
1587default:
1588break;
1589}
1590break;
1591default:
1592break;
1593}
1594break;
1595default:
1596break;
1597}
1598break;
1599default:
1600break;
1601}
1602break;
1603case Opcode::UDiv64:
1604switch (sizeof...(Arguments)) {
1605case 3:
1606switch (opgenHiddenPtrIdentity(kinds)[0]) {
1607case Arg::Tmp:
1608switch (opgenHiddenPtrIdentity(kinds)[1]) {
1609case Arg::Tmp:
1610switch (opgenHiddenPtrIdentity(kinds)[2]) {
1611case Arg::Tmp:
1612#if CPU(ARM64)
1613OPGEN_RETURN(true);
1614#endif
1615break;
1616break;
1617default:
1618break;
1619}
1620break;
1621default:
1622break;
1623}
1624break;
1625default:
1626break;
1627}
1628break;
1629default:
1630break;
1631}
1632break;
1633case Opcode::MulDouble:
1634switch (sizeof...(Arguments)) {
1635case 3:
1636switch (opgenHiddenPtrIdentity(kinds)[0]) {
1637case Arg::Tmp:
1638switch (opgenHiddenPtrIdentity(kinds)[1]) {
1639case Arg::Tmp:
1640switch (opgenHiddenPtrIdentity(kinds)[2]) {
1641case Arg::Tmp:
1642OPGEN_RETURN(true);
1643break;
1644break;
1645default:
1646break;
1647}
1648break;
1649case Arg::Addr:
1650case Arg::Stack:
1651case Arg::CallArg:
1652switch (opgenHiddenPtrIdentity(kinds)[2]) {
1653case Arg::Tmp:
1654#if CPU(X86) || CPU(X86_64)
1655OPGEN_RETURN(true);
1656#endif
1657break;
1658break;
1659default:
1660break;
1661}
1662break;
1663default:
1664break;
1665}
1666break;
1667case Arg::Addr:
1668case Arg::Stack:
1669case Arg::CallArg:
1670switch (opgenHiddenPtrIdentity(kinds)[1]) {
1671case Arg::Tmp:
1672switch (opgenHiddenPtrIdentity(kinds)[2]) {
1673case Arg::Tmp:
1674#if CPU(X86) || CPU(X86_64)
1675OPGEN_RETURN(true);
1676#endif
1677break;
1678break;
1679default:
1680break;
1681}
1682break;
1683default:
1684break;
1685}
1686break;
1687case Arg::Index:
1688switch (opgenHiddenPtrIdentity(kinds)[1]) {
1689case Arg::Tmp:
1690switch (opgenHiddenPtrIdentity(kinds)[2]) {
1691case Arg::Tmp:
1692#if CPU(X86) || CPU(X86_64)
1693OPGEN_RETURN(true);
1694#endif
1695break;
1696break;
1697default:
1698break;
1699}
1700break;
1701default:
1702break;
1703}
1704break;
1705default:
1706break;
1707}
1708break;
1709case 2:
1710switch (opgenHiddenPtrIdentity(kinds)[0]) {
1711case Arg::Tmp:
1712switch (opgenHiddenPtrIdentity(kinds)[1]) {
1713case Arg::Tmp:
1714#if CPU(X86) || CPU(X86_64)
1715OPGEN_RETURN(true);
1716#endif
1717break;
1718break;
1719default:
1720break;
1721}
1722break;
1723case Arg::Addr:
1724case Arg::Stack:
1725case Arg::CallArg:
1726switch (opgenHiddenPtrIdentity(kinds)[1]) {
1727case Arg::Tmp:
1728#if CPU(X86) || CPU(X86_64)
1729OPGEN_RETURN(true);
1730#endif
1731break;
1732break;
1733default:
1734break;
1735}
1736break;
1737default:
1738break;
1739}
1740break;
1741default:
1742break;
1743}
1744break;
1745case Opcode::MulFloat:
1746switch (sizeof...(Arguments)) {
1747case 3:
1748switch (opgenHiddenPtrIdentity(kinds)[0]) {
1749case Arg::Tmp:
1750switch (opgenHiddenPtrIdentity(kinds)[1]) {
1751case Arg::Tmp:
1752switch (opgenHiddenPtrIdentity(kinds)[2]) {
1753case Arg::Tmp:
1754OPGEN_RETURN(true);
1755break;
1756break;
1757default:
1758break;
1759}
1760break;
1761case Arg::Addr:
1762case Arg::Stack:
1763case Arg::CallArg:
1764switch (opgenHiddenPtrIdentity(kinds)[2]) {
1765case Arg::Tmp:
1766#if CPU(X86) || CPU(X86_64)
1767OPGEN_RETURN(true);
1768#endif
1769break;
1770break;
1771default:
1772break;
1773}
1774break;
1775default:
1776break;
1777}
1778break;
1779case Arg::Addr:
1780case Arg::Stack:
1781case Arg::CallArg:
1782switch (opgenHiddenPtrIdentity(kinds)[1]) {
1783case Arg::Tmp:
1784switch (opgenHiddenPtrIdentity(kinds)[2]) {
1785case Arg::Tmp:
1786#if CPU(X86) || CPU(X86_64)
1787OPGEN_RETURN(true);
1788#endif
1789break;
1790break;
1791default:
1792break;
1793}
1794break;
1795default:
1796break;
1797}
1798break;
1799case Arg::Index:
1800switch (opgenHiddenPtrIdentity(kinds)[1]) {
1801case Arg::Tmp:
1802switch (opgenHiddenPtrIdentity(kinds)[2]) {
1803case Arg::Tmp:
1804#if CPU(X86) || CPU(X86_64)
1805OPGEN_RETURN(true);
1806#endif
1807break;
1808break;
1809default:
1810break;
1811}
1812break;
1813default:
1814break;
1815}
1816break;
1817default:
1818break;
1819}
1820break;
1821case 2:
1822switch (opgenHiddenPtrIdentity(kinds)[0]) {
1823case Arg::Tmp:
1824switch (opgenHiddenPtrIdentity(kinds)[1]) {
1825case Arg::Tmp:
1826#if CPU(X86) || CPU(X86_64)
1827OPGEN_RETURN(true);
1828#endif
1829break;
1830break;
1831default:
1832break;
1833}
1834break;
1835case Arg::Addr:
1836case Arg::Stack:
1837case Arg::CallArg:
1838switch (opgenHiddenPtrIdentity(kinds)[1]) {
1839case Arg::Tmp:
1840#if CPU(X86) || CPU(X86_64)
1841OPGEN_RETURN(true);
1842#endif
1843break;
1844break;
1845default:
1846break;
1847}
1848break;
1849default:
1850break;
1851}
1852break;
1853default:
1854break;
1855}
1856break;
1857case Opcode::DivDouble:
1858switch (sizeof...(Arguments)) {
1859case 3:
1860switch (opgenHiddenPtrIdentity(kinds)[0]) {
1861case Arg::Tmp:
1862switch (opgenHiddenPtrIdentity(kinds)[1]) {
1863case Arg::Tmp:
1864switch (opgenHiddenPtrIdentity(kinds)[2]) {
1865case Arg::Tmp:
1866#if CPU(ARM64)
1867OPGEN_RETURN(true);
1868#endif
1869break;
1870break;
1871default:
1872break;
1873}
1874break;
1875default:
1876break;
1877}
1878break;
1879default:
1880break;
1881}
1882break;
1883case 2:
1884switch (opgenHiddenPtrIdentity(kinds)[0]) {
1885case Arg::Tmp:
1886switch (opgenHiddenPtrIdentity(kinds)[1]) {
1887case Arg::Tmp:
1888#if CPU(X86) || CPU(X86_64)
1889OPGEN_RETURN(true);
1890#endif
1891break;
1892break;
1893default:
1894break;
1895}
1896break;
1897case Arg::Addr:
1898case Arg::Stack:
1899case Arg::CallArg:
1900switch (opgenHiddenPtrIdentity(kinds)[1]) {
1901case Arg::Tmp:
1902#if CPU(X86) || CPU(X86_64)
1903OPGEN_RETURN(true);
1904#endif
1905break;
1906break;
1907default:
1908break;
1909}
1910break;
1911default:
1912break;
1913}
1914break;
1915default:
1916break;
1917}
1918break;
1919case Opcode::DivFloat:
1920switch (sizeof...(Arguments)) {
1921case 3:
1922switch (opgenHiddenPtrIdentity(kinds)[0]) {
1923case Arg::Tmp:
1924switch (opgenHiddenPtrIdentity(kinds)[1]) {
1925case Arg::Tmp:
1926switch (opgenHiddenPtrIdentity(kinds)[2]) {
1927case Arg::Tmp:
1928#if CPU(ARM64)
1929OPGEN_RETURN(true);
1930#endif
1931break;
1932break;
1933default:
1934break;
1935}
1936break;
1937default:
1938break;
1939}
1940break;
1941default:
1942break;
1943}
1944break;
1945case 2:
1946switch (opgenHiddenPtrIdentity(kinds)[0]) {
1947case Arg::Tmp:
1948switch (opgenHiddenPtrIdentity(kinds)[1]) {
1949case Arg::Tmp:
1950#if CPU(X86) || CPU(X86_64)
1951OPGEN_RETURN(true);
1952#endif
1953break;
1954break;
1955default:
1956break;
1957}
1958break;
1959case Arg::Addr:
1960case Arg::Stack:
1961case Arg::CallArg:
1962switch (opgenHiddenPtrIdentity(kinds)[1]) {
1963case Arg::Tmp:
1964#if CPU(X86) || CPU(X86_64)
1965OPGEN_RETURN(true);
1966#endif
1967break;
1968break;
1969default:
1970break;
1971}
1972break;
1973default:
1974break;
1975}
1976break;
1977default:
1978break;
1979}
1980break;
1981case Opcode::X86ConvertToDoubleWord32:
1982switch (sizeof...(Arguments)) {
1983case 2:
1984switch (opgenHiddenPtrIdentity(kinds)[0]) {
1985case Arg::Tmp:
1986switch (opgenHiddenPtrIdentity(kinds)[1]) {
1987case Arg::Tmp:
1988break;
1989break;
1990default:
1991break;
1992}
1993break;
1994default:
1995break;
1996}
1997break;
1998default:
1999break;
2000}
2001break;
2002case Opcode::X86ConvertToQuadWord64:
2003switch (sizeof...(Arguments)) {
2004case 2:
2005switch (opgenHiddenPtrIdentity(kinds)[0]) {
2006case Arg::Tmp:
2007switch (opgenHiddenPtrIdentity(kinds)[1]) {
2008case Arg::Tmp:
2009break;
2010break;
2011default:
2012break;
2013}
2014break;
2015default:
2016break;
2017}
2018break;
2019default:
2020break;
2021}
2022break;
2023case Opcode::X86Div32:
2024switch (sizeof...(Arguments)) {
2025case 3:
2026switch (opgenHiddenPtrIdentity(kinds)[0]) {
2027case Arg::Tmp:
2028switch (opgenHiddenPtrIdentity(kinds)[1]) {
2029case Arg::Tmp:
2030switch (opgenHiddenPtrIdentity(kinds)[2]) {
2031case Arg::Tmp:
2032break;
2033break;
2034default:
2035break;
2036}
2037break;
2038default:
2039break;
2040}
2041break;
2042default:
2043break;
2044}
2045break;
2046default:
2047break;
2048}
2049break;
2050case Opcode::X86UDiv32:
2051switch (sizeof...(Arguments)) {
2052case 3:
2053switch (opgenHiddenPtrIdentity(kinds)[0]) {
2054case Arg::Tmp:
2055switch (opgenHiddenPtrIdentity(kinds)[1]) {
2056case Arg::Tmp:
2057switch (opgenHiddenPtrIdentity(kinds)[2]) {
2058case Arg::Tmp:
2059break;
2060break;
2061default:
2062break;
2063}
2064break;
2065default:
2066break;
2067}
2068break;
2069default:
2070break;
2071}
2072break;
2073default:
2074break;
2075}
2076break;
2077case Opcode::X86Div64:
2078switch (sizeof...(Arguments)) {
2079case 3:
2080switch (opgenHiddenPtrIdentity(kinds)[0]) {
2081case Arg::Tmp:
2082switch (opgenHiddenPtrIdentity(kinds)[1]) {
2083case Arg::Tmp:
2084switch (opgenHiddenPtrIdentity(kinds)[2]) {
2085case Arg::Tmp:
2086break;
2087break;
2088default:
2089break;
2090}
2091break;
2092default:
2093break;
2094}
2095break;
2096default:
2097break;
2098}
2099break;
2100default:
2101break;
2102}
2103break;
2104case Opcode::X86UDiv64:
2105switch (sizeof...(Arguments)) {
2106case 3:
2107switch (opgenHiddenPtrIdentity(kinds)[0]) {
2108case Arg::Tmp:
2109switch (opgenHiddenPtrIdentity(kinds)[1]) {
2110case Arg::Tmp:
2111switch (opgenHiddenPtrIdentity(kinds)[2]) {
2112case Arg::Tmp:
2113break;
2114break;
2115default:
2116break;
2117}
2118break;
2119default:
2120break;
2121}
2122break;
2123default:
2124break;
2125}
2126break;
2127default:
2128break;
2129}
2130break;
2131case Opcode::Lea32:
2132switch (sizeof...(Arguments)) {
2133case 2:
2134switch (opgenHiddenPtrIdentity(kinds)[0]) {
2135case Arg::Addr:
2136case Arg::Stack:
2137case Arg::CallArg:
2138switch (opgenHiddenPtrIdentity(kinds)[1]) {
2139case Arg::Tmp:
2140if (opgenHiddenPtrIdentity(kinds)[0] == Arg::Stack)
2141 return false;
2142OPGEN_RETURN(true);
2143break;
2144break;
2145default:
2146break;
2147}
2148break;
2149case Arg::Index:
2150switch (opgenHiddenPtrIdentity(kinds)[1]) {
2151case Arg::Tmp:
2152if (opgenHiddenPtrIdentity(kinds)[0] == Arg::Stack)
2153 return false;
2154#if CPU(X86) || CPU(X86_64)
2155OPGEN_RETURN(true);
2156#endif
2157break;
2158break;
2159default:
2160break;
2161}
2162break;
2163default:
2164break;
2165}
2166break;
2167default:
2168break;
2169}
2170break;
2171case Opcode::Lea64:
2172switch (sizeof...(Arguments)) {
2173case 2:
2174switch (opgenHiddenPtrIdentity(kinds)[0]) {
2175case Arg::Addr:
2176case Arg::Stack:
2177case Arg::CallArg:
2178switch (opgenHiddenPtrIdentity(kinds)[1]) {
2179case Arg::Tmp:
2180if (opgenHiddenPtrIdentity(kinds)[0] == Arg::Stack)
2181 return false;
2182OPGEN_RETURN(true);
2183break;
2184break;
2185default:
2186break;
2187}
2188break;
2189case Arg::Index:
2190switch (opgenHiddenPtrIdentity(kinds)[1]) {
2191case Arg::Tmp:
2192if (opgenHiddenPtrIdentity(kinds)[0] == Arg::Stack)
2193 return false;
2194#if CPU(X86) || CPU(X86_64)
2195OPGEN_RETURN(true);
2196#endif
2197break;
2198break;
2199default:
2200break;
2201}
2202break;
2203default:
2204break;
2205}
2206break;
2207default:
2208break;
2209}
2210break;
2211case Opcode::And32:
2212switch (sizeof...(Arguments)) {
2213case 3:
2214switch (opgenHiddenPtrIdentity(kinds)[0]) {
2215case Arg::Tmp:
2216switch (opgenHiddenPtrIdentity(kinds)[1]) {
2217case Arg::Tmp:
2218switch (opgenHiddenPtrIdentity(kinds)[2]) {
2219case Arg::Tmp:
2220OPGEN_RETURN(true);
2221break;
2222break;
2223default:
2224break;
2225}
2226break;
2227case Arg::Addr:
2228case Arg::Stack:
2229case Arg::CallArg:
2230switch (opgenHiddenPtrIdentity(kinds)[2]) {
2231case Arg::Tmp:
2232#if CPU(X86) || CPU(X86_64)
2233OPGEN_RETURN(true);
2234#endif
2235break;
2236break;
2237default:
2238break;
2239}
2240break;
2241default:
2242break;
2243}
2244break;
2245case Arg::BitImm:
2246switch (opgenHiddenPtrIdentity(kinds)[1]) {
2247case Arg::Tmp:
2248switch (opgenHiddenPtrIdentity(kinds)[2]) {
2249case Arg::Tmp:
2250#if CPU(ARM64)
2251OPGEN_RETURN(true);
2252#endif
2253break;
2254break;
2255default:
2256break;
2257}
2258break;
2259default:
2260break;
2261}
2262break;
2263case Arg::Addr:
2264case Arg::Stack:
2265case Arg::CallArg:
2266switch (opgenHiddenPtrIdentity(kinds)[1]) {
2267case Arg::Tmp:
2268switch (opgenHiddenPtrIdentity(kinds)[2]) {
2269case Arg::Tmp:
2270#if CPU(X86) || CPU(X86_64)
2271OPGEN_RETURN(true);
2272#endif
2273break;
2274break;
2275default:
2276break;
2277}
2278break;
2279default:
2280break;
2281}
2282break;
2283default:
2284break;
2285}
2286break;
2287case 2:
2288switch (opgenHiddenPtrIdentity(kinds)[0]) {
2289case Arg::Tmp:
2290switch (opgenHiddenPtrIdentity(kinds)[1]) {
2291case Arg::Tmp:
2292OPGEN_RETURN(true);
2293break;
2294break;
2295case Arg::Addr:
2296case Arg::Stack:
2297case Arg::CallArg:
2298#if CPU(X86) || CPU(X86_64)
2299OPGEN_RETURN(true);
2300#endif
2301break;
2302break;
2303case Arg::Index:
2304#if CPU(X86) || CPU(X86_64)
2305OPGEN_RETURN(true);
2306#endif
2307break;
2308break;
2309default:
2310break;
2311}
2312break;
2313case Arg::Imm:
2314switch (opgenHiddenPtrIdentity(kinds)[1]) {
2315case Arg::Tmp:
2316#if CPU(X86) || CPU(X86_64)
2317OPGEN_RETURN(true);
2318#endif
2319break;
2320break;
2321case Arg::Addr:
2322case Arg::Stack:
2323case Arg::CallArg:
2324#if CPU(X86) || CPU(X86_64)
2325OPGEN_RETURN(true);
2326#endif
2327break;
2328break;
2329case Arg::Index:
2330#if CPU(X86) || CPU(X86_64)
2331OPGEN_RETURN(true);
2332#endif
2333break;
2334break;
2335default:
2336break;
2337}
2338break;
2339case Arg::Addr:
2340case Arg::Stack:
2341case Arg::CallArg:
2342switch (opgenHiddenPtrIdentity(kinds)[1]) {
2343case Arg::Tmp:
2344#if CPU(X86) || CPU(X86_64)
2345OPGEN_RETURN(true);
2346#endif
2347break;
2348break;
2349default:
2350break;
2351}
2352break;
2353case Arg::Index:
2354switch (opgenHiddenPtrIdentity(kinds)[1]) {
2355case Arg::Tmp:
2356#if CPU(X86) || CPU(X86_64)
2357OPGEN_RETURN(true);
2358#endif
2359break;
2360break;
2361default:
2362break;
2363}
2364break;
2365default:
2366break;
2367}
2368break;
2369default:
2370break;
2371}
2372break;
2373case Opcode::And64:
2374switch (sizeof...(Arguments)) {
2375case 3:
2376switch (opgenHiddenPtrIdentity(kinds)[0]) {
2377case Arg::Tmp:
2378switch (opgenHiddenPtrIdentity(kinds)[1]) {
2379case Arg::Tmp:
2380switch (opgenHiddenPtrIdentity(kinds)[2]) {
2381case Arg::Tmp:
2382#if CPU(X86_64) || CPU(ARM64)
2383OPGEN_RETURN(true);
2384#endif
2385break;
2386break;
2387default:
2388break;
2389}
2390break;
2391default:
2392break;
2393}
2394break;
2395#if USE(JSVALUE64)
2396case Arg::BitImm64:
2397switch (opgenHiddenPtrIdentity(kinds)[1]) {
2398case Arg::Tmp:
2399switch (opgenHiddenPtrIdentity(kinds)[2]) {
2400case Arg::Tmp:
2401#if CPU(ARM64)
2402OPGEN_RETURN(true);
2403#endif
2404break;
2405break;
2406default:
2407break;
2408}
2409break;
2410default:
2411break;
2412}
2413break;
2414#endif // USE(JSVALUE64)
2415default:
2416break;
2417}
2418break;
2419case 2:
2420switch (opgenHiddenPtrIdentity(kinds)[0]) {
2421case Arg::Tmp:
2422switch (opgenHiddenPtrIdentity(kinds)[1]) {
2423case Arg::Tmp:
2424#if CPU(X86_64)
2425OPGEN_RETURN(true);
2426#endif
2427break;
2428break;
2429case Arg::Addr:
2430case Arg::Stack:
2431case Arg::CallArg:
2432#if CPU(X86_64)
2433OPGEN_RETURN(true);
2434#endif
2435break;
2436break;
2437case Arg::Index:
2438#if CPU(X86_64)
2439OPGEN_RETURN(true);
2440#endif
2441break;
2442break;
2443default:
2444break;
2445}
2446break;
2447case Arg::Imm:
2448switch (opgenHiddenPtrIdentity(kinds)[1]) {
2449case Arg::Tmp:
2450#if CPU(X86_64)
2451OPGEN_RETURN(true);
2452#endif
2453break;
2454break;
2455case Arg::Addr:
2456case Arg::Stack:
2457case Arg::CallArg:
2458#if CPU(X86_64)
2459OPGEN_RETURN(true);
2460#endif
2461break;
2462break;
2463case Arg::Index:
2464#if CPU(X86_64)
2465OPGEN_RETURN(true);
2466#endif
2467break;
2468break;
2469default:
2470break;
2471}
2472break;
2473case Arg::Addr:
2474case Arg::Stack:
2475case Arg::CallArg:
2476switch (opgenHiddenPtrIdentity(kinds)[1]) {
2477case Arg::Tmp:
2478#if CPU(X86_64)
2479OPGEN_RETURN(true);
2480#endif
2481break;
2482break;
2483default:
2484break;
2485}
2486break;
2487case Arg::Index:
2488switch (opgenHiddenPtrIdentity(kinds)[1]) {
2489case Arg::Tmp:
2490#if CPU(X86_64)
2491OPGEN_RETURN(true);
2492#endif
2493break;
2494break;
2495default:
2496break;
2497}
2498break;
2499default:
2500break;
2501}
2502break;
2503default:
2504break;
2505}
2506break;
2507case Opcode::AndDouble:
2508switch (sizeof...(Arguments)) {
2509case 3:
2510switch (opgenHiddenPtrIdentity(kinds)[0]) {
2511case Arg::Tmp:
2512switch (opgenHiddenPtrIdentity(kinds)[1]) {
2513case Arg::Tmp:
2514switch (opgenHiddenPtrIdentity(kinds)[2]) {
2515case Arg::Tmp:
2516OPGEN_RETURN(true);
2517break;
2518break;
2519default:
2520break;
2521}
2522break;
2523default:
2524break;
2525}
2526break;
2527default:
2528break;
2529}
2530break;
2531case 2:
2532switch (opgenHiddenPtrIdentity(kinds)[0]) {
2533case Arg::Tmp:
2534switch (opgenHiddenPtrIdentity(kinds)[1]) {
2535case Arg::Tmp:
2536#if CPU(X86) || CPU(X86_64)
2537OPGEN_RETURN(true);
2538#endif
2539break;
2540break;
2541default:
2542break;
2543}
2544break;
2545default:
2546break;
2547}
2548break;
2549default:
2550break;
2551}
2552break;
2553case Opcode::AndFloat:
2554switch (sizeof...(Arguments)) {
2555case 3:
2556switch (opgenHiddenPtrIdentity(kinds)[0]) {
2557case Arg::Tmp:
2558switch (opgenHiddenPtrIdentity(kinds)[1]) {
2559case Arg::Tmp:
2560switch (opgenHiddenPtrIdentity(kinds)[2]) {
2561case Arg::Tmp:
2562OPGEN_RETURN(true);
2563break;
2564break;
2565default:
2566break;
2567}
2568break;
2569default:
2570break;
2571}
2572break;
2573default:
2574break;
2575}
2576break;
2577case 2:
2578switch (opgenHiddenPtrIdentity(kinds)[0]) {
2579case Arg::Tmp:
2580switch (opgenHiddenPtrIdentity(kinds)[1]) {
2581case Arg::Tmp:
2582#if CPU(X86) || CPU(X86_64)
2583OPGEN_RETURN(true);
2584#endif
2585break;
2586break;
2587default:
2588break;
2589}
2590break;
2591default:
2592break;
2593}
2594break;
2595default:
2596break;
2597}
2598break;
2599case Opcode::OrDouble:
2600switch (sizeof...(Arguments)) {
2601case 3:
2602switch (opgenHiddenPtrIdentity(kinds)[0]) {
2603case Arg::Tmp:
2604switch (opgenHiddenPtrIdentity(kinds)[1]) {
2605case Arg::Tmp:
2606switch (opgenHiddenPtrIdentity(kinds)[2]) {
2607case Arg::Tmp:
2608OPGEN_RETURN(true);
2609break;
2610break;
2611default:
2612break;
2613}
2614break;
2615default:
2616break;
2617}
2618break;
2619default:
2620break;
2621}
2622break;
2623case 2:
2624switch (opgenHiddenPtrIdentity(kinds)[0]) {
2625case Arg::Tmp:
2626switch (opgenHiddenPtrIdentity(kinds)[1]) {
2627case Arg::Tmp:
2628#if CPU(X86) || CPU(X86_64)
2629OPGEN_RETURN(true);
2630#endif
2631break;
2632break;
2633default:
2634break;
2635}
2636break;
2637default:
2638break;
2639}
2640break;
2641default:
2642break;
2643}
2644break;
2645case Opcode::OrFloat:
2646switch (sizeof...(Arguments)) {
2647case 3:
2648switch (opgenHiddenPtrIdentity(kinds)[0]) {
2649case Arg::Tmp:
2650switch (opgenHiddenPtrIdentity(kinds)[1]) {
2651case Arg::Tmp:
2652switch (opgenHiddenPtrIdentity(kinds)[2]) {
2653case Arg::Tmp:
2654OPGEN_RETURN(true);
2655break;
2656break;
2657default:
2658break;
2659}
2660break;
2661default:
2662break;
2663}
2664break;
2665default:
2666break;
2667}
2668break;
2669case 2:
2670switch (opgenHiddenPtrIdentity(kinds)[0]) {
2671case Arg::Tmp:
2672switch (opgenHiddenPtrIdentity(kinds)[1]) {
2673case Arg::Tmp:
2674#if CPU(X86) || CPU(X86_64)
2675OPGEN_RETURN(true);
2676#endif
2677break;
2678break;
2679default:
2680break;
2681}
2682break;
2683default:
2684break;
2685}
2686break;
2687default:
2688break;
2689}
2690break;
2691case Opcode::XorDouble:
2692switch (sizeof...(Arguments)) {
2693case 3:
2694switch (opgenHiddenPtrIdentity(kinds)[0]) {
2695case Arg::Tmp:
2696switch (opgenHiddenPtrIdentity(kinds)[1]) {
2697case Arg::Tmp:
2698switch (opgenHiddenPtrIdentity(kinds)[2]) {
2699case Arg::Tmp:
2700#if CPU(X86) || CPU(X86_64)
2701OPGEN_RETURN(true);
2702#endif
2703break;
2704break;
2705default:
2706break;
2707}
2708break;
2709default:
2710break;
2711}
2712break;
2713default:
2714break;
2715}
2716break;
2717case 2:
2718switch (opgenHiddenPtrIdentity(kinds)[0]) {
2719case Arg::Tmp:
2720switch (opgenHiddenPtrIdentity(kinds)[1]) {
2721case Arg::Tmp:
2722#if CPU(X86) || CPU(X86_64)
2723OPGEN_RETURN(true);
2724#endif
2725break;
2726break;
2727default:
2728break;
2729}
2730break;
2731default:
2732break;
2733}
2734break;
2735default:
2736break;
2737}
2738break;
2739case Opcode::XorFloat:
2740switch (sizeof...(Arguments)) {
2741case 3:
2742switch (opgenHiddenPtrIdentity(kinds)[0]) {
2743case Arg::Tmp:
2744switch (opgenHiddenPtrIdentity(kinds)[1]) {
2745case Arg::Tmp:
2746switch (opgenHiddenPtrIdentity(kinds)[2]) {
2747case Arg::Tmp:
2748#if CPU(X86) || CPU(X86_64)
2749OPGEN_RETURN(true);
2750#endif
2751break;
2752break;
2753default:
2754break;
2755}
2756break;
2757default:
2758break;
2759}
2760break;
2761default:
2762break;
2763}
2764break;
2765case 2:
2766switch (opgenHiddenPtrIdentity(kinds)[0]) {
2767case Arg::Tmp:
2768switch (opgenHiddenPtrIdentity(kinds)[1]) {
2769case Arg::Tmp:
2770#if CPU(X86) || CPU(X86_64)
2771OPGEN_RETURN(true);
2772#endif
2773break;
2774break;
2775default:
2776break;
2777}
2778break;
2779default:
2780break;
2781}
2782break;
2783default:
2784break;
2785}
2786break;
2787case Opcode::Lshift32:
2788switch (sizeof...(Arguments)) {
2789case 3:
2790switch (opgenHiddenPtrIdentity(kinds)[0]) {
2791case Arg::Tmp:
2792switch (opgenHiddenPtrIdentity(kinds)[1]) {
2793case Arg::Tmp:
2794switch (opgenHiddenPtrIdentity(kinds)[2]) {
2795case Arg::Tmp:
2796#if CPU(ARM64)
2797OPGEN_RETURN(true);
2798#endif
2799break;
2800break;
2801default:
2802break;
2803}
2804break;
2805case Arg::Imm:
2806switch (opgenHiddenPtrIdentity(kinds)[2]) {
2807case Arg::Tmp:
2808#if CPU(ARM64)
2809OPGEN_RETURN(true);
2810#endif
2811break;
2812break;
2813default:
2814break;
2815}
2816break;
2817default:
2818break;
2819}
2820break;
2821default:
2822break;
2823}
2824break;
2825case 2:
2826switch (opgenHiddenPtrIdentity(kinds)[0]) {
2827case Arg::Tmp:
2828switch (opgenHiddenPtrIdentity(kinds)[1]) {
2829case Arg::Tmp:
2830break;
2831break;
2832default:
2833break;
2834}
2835break;
2836case Arg::Imm:
2837switch (opgenHiddenPtrIdentity(kinds)[1]) {
2838case Arg::Tmp:
2839#if CPU(X86) || CPU(X86_64)
2840OPGEN_RETURN(true);
2841#endif
2842break;
2843break;
2844default:
2845break;
2846}
2847break;
2848default:
2849break;
2850}
2851break;
2852default:
2853break;
2854}
2855break;
2856case Opcode::Lshift64:
2857switch (sizeof...(Arguments)) {
2858case 3:
2859switch (opgenHiddenPtrIdentity(kinds)[0]) {
2860case Arg::Tmp:
2861switch (opgenHiddenPtrIdentity(kinds)[1]) {
2862case Arg::Tmp:
2863switch (opgenHiddenPtrIdentity(kinds)[2]) {
2864case Arg::Tmp:
2865#if CPU(ARM64)
2866OPGEN_RETURN(true);
2867#endif
2868break;
2869break;
2870default:
2871break;
2872}
2873break;
2874case Arg::Imm:
2875switch (opgenHiddenPtrIdentity(kinds)[2]) {
2876case Arg::Tmp:
2877#if CPU(ARM64)
2878OPGEN_RETURN(true);
2879#endif
2880break;
2881break;
2882default:
2883break;
2884}
2885break;
2886default:
2887break;
2888}
2889break;
2890default:
2891break;
2892}
2893break;
2894case 2:
2895switch (opgenHiddenPtrIdentity(kinds)[0]) {
2896case Arg::Tmp:
2897switch (opgenHiddenPtrIdentity(kinds)[1]) {
2898case Arg::Tmp:
2899break;
2900break;
2901default:
2902break;
2903}
2904break;
2905case Arg::Imm:
2906switch (opgenHiddenPtrIdentity(kinds)[1]) {
2907case Arg::Tmp:
2908#if CPU(X86_64)
2909OPGEN_RETURN(true);
2910#endif
2911break;
2912break;
2913default:
2914break;
2915}
2916break;
2917default:
2918break;
2919}
2920break;
2921default:
2922break;
2923}
2924break;
2925case Opcode::Rshift32:
2926switch (sizeof...(Arguments)) {
2927case 3:
2928switch (opgenHiddenPtrIdentity(kinds)[0]) {
2929case Arg::Tmp:
2930switch (opgenHiddenPtrIdentity(kinds)[1]) {
2931case Arg::Tmp:
2932switch (opgenHiddenPtrIdentity(kinds)[2]) {
2933case Arg::Tmp:
2934#if CPU(ARM64)
2935OPGEN_RETURN(true);
2936#endif
2937break;
2938break;
2939default:
2940break;
2941}
2942break;
2943case Arg::Imm:
2944switch (opgenHiddenPtrIdentity(kinds)[2]) {
2945case Arg::Tmp:
2946#if CPU(ARM64)
2947OPGEN_RETURN(true);
2948#endif
2949break;
2950break;
2951default:
2952break;
2953}
2954break;
2955default:
2956break;
2957}
2958break;
2959default:
2960break;
2961}
2962break;
2963case 2:
2964switch (opgenHiddenPtrIdentity(kinds)[0]) {
2965case Arg::Tmp:
2966switch (opgenHiddenPtrIdentity(kinds)[1]) {
2967case Arg::Tmp:
2968break;
2969break;
2970default:
2971break;
2972}
2973break;
2974case Arg::Imm:
2975switch (opgenHiddenPtrIdentity(kinds)[1]) {
2976case Arg::Tmp:
2977#if CPU(X86) || CPU(X86_64)
2978OPGEN_RETURN(true);
2979#endif
2980break;
2981break;
2982default:
2983break;
2984}
2985break;
2986default:
2987break;
2988}
2989break;
2990default:
2991break;
2992}
2993break;
2994case Opcode::Rshift64:
2995switch (sizeof...(Arguments)) {
2996case 3:
2997switch (opgenHiddenPtrIdentity(kinds)[0]) {
2998case Arg::Tmp:
2999switch (opgenHiddenPtrIdentity(kinds)[1]) {
3000case Arg::Tmp:
3001switch (opgenHiddenPtrIdentity(kinds)[2]) {
3002case Arg::Tmp:
3003#if CPU(ARM64)
3004OPGEN_RETURN(true);
3005#endif
3006break;
3007break;
3008default:
3009break;
3010}
3011break;
3012case Arg::Imm:
3013switch (opgenHiddenPtrIdentity(kinds)[2]) {
3014case Arg::Tmp:
3015#if CPU(ARM64)
3016OPGEN_RETURN(true);
3017#endif
3018break;
3019break;
3020default:
3021break;
3022}
3023break;
3024default:
3025break;
3026}
3027break;
3028default:
3029break;
3030}
3031break;
3032case 2:
3033switch (opgenHiddenPtrIdentity(kinds)[0]) {
3034case Arg::Tmp:
3035switch (opgenHiddenPtrIdentity(kinds)[1]) {
3036case Arg::Tmp:
3037break;
3038break;
3039default:
3040break;
3041}
3042break;
3043case Arg::Imm:
3044switch (opgenHiddenPtrIdentity(kinds)[1]) {
3045case Arg::Tmp:
3046#if CPU(X86_64)
3047OPGEN_RETURN(true);
3048#endif
3049break;
3050break;
3051default:
3052break;
3053}
3054break;
3055default:
3056break;
3057}
3058break;
3059default:
3060break;
3061}
3062break;
3063case Opcode::Urshift32:
3064switch (sizeof...(Arguments)) {
3065case 3:
3066switch (opgenHiddenPtrIdentity(kinds)[0]) {
3067case Arg::Tmp:
3068switch (opgenHiddenPtrIdentity(kinds)[1]) {
3069case Arg::Tmp:
3070switch (opgenHiddenPtrIdentity(kinds)[2]) {
3071case Arg::Tmp:
3072#if CPU(ARM64)
3073OPGEN_RETURN(true);
3074#endif
3075break;
3076break;
3077default:
3078break;
3079}
3080break;
3081case Arg::Imm:
3082switch (opgenHiddenPtrIdentity(kinds)[2]) {
3083case Arg::Tmp:
3084#if CPU(ARM64)
3085OPGEN_RETURN(true);
3086#endif
3087break;
3088break;
3089default:
3090break;
3091}
3092break;
3093default:
3094break;
3095}
3096break;
3097default:
3098break;
3099}
3100break;
3101case 2:
3102switch (opgenHiddenPtrIdentity(kinds)[0]) {
3103case Arg::Tmp:
3104switch (opgenHiddenPtrIdentity(kinds)[1]) {
3105case Arg::Tmp:
3106break;
3107break;
3108default:
3109break;
3110}
3111break;
3112case Arg::Imm:
3113switch (opgenHiddenPtrIdentity(kinds)[1]) {
3114case Arg::Tmp:
3115#if CPU(X86) || CPU(X86_64)
3116OPGEN_RETURN(true);
3117#endif
3118break;
3119break;
3120default:
3121break;
3122}
3123break;
3124default:
3125break;
3126}
3127break;
3128default:
3129break;
3130}
3131break;
3132case Opcode::Urshift64:
3133switch (sizeof...(Arguments)) {
3134case 3:
3135switch (opgenHiddenPtrIdentity(kinds)[0]) {
3136case Arg::Tmp:
3137switch (opgenHiddenPtrIdentity(kinds)[1]) {
3138case Arg::Tmp:
3139switch (opgenHiddenPtrIdentity(kinds)[2]) {
3140case Arg::Tmp:
3141#if CPU(ARM64)
3142OPGEN_RETURN(true);
3143#endif
3144break;
3145break;
3146default:
3147break;
3148}
3149break;
3150case Arg::Imm:
3151switch (opgenHiddenPtrIdentity(kinds)[2]) {
3152case Arg::Tmp:
3153#if CPU(ARM64)
3154OPGEN_RETURN(true);
3155#endif
3156break;
3157break;
3158default:
3159break;
3160}
3161break;
3162default:
3163break;
3164}
3165break;
3166default:
3167break;
3168}
3169break;
3170case 2:
3171switch (opgenHiddenPtrIdentity(kinds)[0]) {
3172case Arg::Tmp:
3173switch (opgenHiddenPtrIdentity(kinds)[1]) {
3174case Arg::Tmp:
3175break;
3176break;
3177default:
3178break;
3179}
3180break;
3181case Arg::Imm:
3182switch (opgenHiddenPtrIdentity(kinds)[1]) {
3183case Arg::Tmp:
3184#if CPU(X86_64)
3185OPGEN_RETURN(true);
3186#endif
3187break;
3188break;
3189default:
3190break;
3191}
3192break;
3193default:
3194break;
3195}
3196break;
3197default:
3198break;
3199}
3200break;
3201case Opcode::RotateRight32:
3202switch (sizeof...(Arguments)) {
3203case 2:
3204switch (opgenHiddenPtrIdentity(kinds)[0]) {
3205case Arg::Tmp:
3206switch (opgenHiddenPtrIdentity(kinds)[1]) {
3207case Arg::Tmp:
3208break;
3209break;
3210default:
3211break;
3212}
3213break;
3214case Arg::Imm:
3215switch (opgenHiddenPtrIdentity(kinds)[1]) {
3216case Arg::Tmp:
3217#if CPU(X86_64)
3218OPGEN_RETURN(true);
3219#endif
3220break;
3221break;
3222default:
3223break;
3224}
3225break;
3226default:
3227break;
3228}
3229break;
3230case 3:
3231switch (opgenHiddenPtrIdentity(kinds)[0]) {
3232case Arg::Tmp:
3233switch (opgenHiddenPtrIdentity(kinds)[1]) {
3234case Arg::Tmp:
3235switch (opgenHiddenPtrIdentity(kinds)[2]) {
3236case Arg::Tmp:
3237#if CPU(ARM64)
3238OPGEN_RETURN(true);
3239#endif
3240break;
3241break;
3242default:
3243break;
3244}
3245break;
3246case Arg::Imm:
3247switch (opgenHiddenPtrIdentity(kinds)[2]) {
3248case Arg::Tmp:
3249#if CPU(ARM64)
3250OPGEN_RETURN(true);
3251#endif
3252break;
3253break;
3254default:
3255break;
3256}
3257break;
3258default:
3259break;
3260}
3261break;
3262default:
3263break;
3264}
3265break;
3266default:
3267break;
3268}
3269break;
3270case Opcode::RotateRight64:
3271switch (sizeof...(Arguments)) {
3272case 2:
3273switch (opgenHiddenPtrIdentity(kinds)[0]) {
3274case Arg::Tmp:
3275switch (opgenHiddenPtrIdentity(kinds)[1]) {
3276case Arg::Tmp:
3277break;
3278break;
3279default:
3280break;
3281}
3282break;
3283case Arg::Imm:
3284switch (opgenHiddenPtrIdentity(kinds)[1]) {
3285case Arg::Tmp:
3286#if CPU(X86_64)
3287OPGEN_RETURN(true);
3288#endif
3289break;
3290break;
3291default:
3292break;
3293}
3294break;
3295default:
3296break;
3297}
3298break;
3299case 3:
3300switch (opgenHiddenPtrIdentity(kinds)[0]) {
3301case Arg::Tmp:
3302switch (opgenHiddenPtrIdentity(kinds)[1]) {
3303case Arg::Tmp:
3304switch (opgenHiddenPtrIdentity(kinds)[2]) {
3305case Arg::Tmp:
3306#if CPU(ARM64)
3307OPGEN_RETURN(true);
3308#endif
3309break;
3310break;
3311default:
3312break;
3313}
3314break;
3315case Arg::Imm:
3316switch (opgenHiddenPtrIdentity(kinds)[2]) {
3317case Arg::Tmp:
3318#if CPU(ARM64)
3319OPGEN_RETURN(true);
3320#endif
3321break;
3322break;
3323default:
3324break;
3325}
3326break;
3327default:
3328break;
3329}
3330break;
3331default:
3332break;
3333}
3334break;
3335default:
3336break;
3337}
3338break;
3339case Opcode::RotateLeft32:
3340switch (sizeof...(Arguments)) {
3341case 2:
3342switch (opgenHiddenPtrIdentity(kinds)[0]) {
3343case Arg::Tmp:
3344switch (opgenHiddenPtrIdentity(kinds)[1]) {
3345case Arg::Tmp:
3346break;
3347break;
3348default:
3349break;
3350}
3351break;
3352case Arg::Imm:
3353switch (opgenHiddenPtrIdentity(kinds)[1]) {
3354case Arg::Tmp:
3355#if CPU(X86_64)
3356OPGEN_RETURN(true);
3357#endif
3358break;
3359break;
3360default:
3361break;
3362}
3363break;
3364default:
3365break;
3366}
3367break;
3368default:
3369break;
3370}
3371break;
3372case Opcode::RotateLeft64:
3373switch (sizeof...(Arguments)) {
3374case 2:
3375switch (opgenHiddenPtrIdentity(kinds)[0]) {
3376case Arg::Tmp:
3377switch (opgenHiddenPtrIdentity(kinds)[1]) {
3378case Arg::Tmp:
3379break;
3380break;
3381default:
3382break;
3383}
3384break;
3385case Arg::Imm:
3386switch (opgenHiddenPtrIdentity(kinds)[1]) {
3387case Arg::Tmp:
3388#if CPU(X86_64)
3389OPGEN_RETURN(true);
3390#endif
3391break;
3392break;
3393default:
3394break;
3395}
3396break;
3397default:
3398break;
3399}
3400break;
3401default:
3402break;
3403}
3404break;
3405case Opcode::Or32:
3406switch (sizeof...(Arguments)) {
3407case 3:
3408switch (opgenHiddenPtrIdentity(kinds)[0]) {
3409case Arg::Tmp:
3410switch (opgenHiddenPtrIdentity(kinds)[1]) {
3411case Arg::Tmp:
3412switch (opgenHiddenPtrIdentity(kinds)[2]) {
3413case Arg::Tmp:
3414OPGEN_RETURN(true);
3415break;
3416break;
3417default:
3418break;
3419}
3420break;
3421case Arg::Addr:
3422case Arg::Stack:
3423case Arg::CallArg:
3424switch (opgenHiddenPtrIdentity(kinds)[2]) {
3425case Arg::Tmp:
3426#if CPU(X86) || CPU(X86_64)
3427OPGEN_RETURN(true);
3428#endif
3429break;
3430break;
3431default:
3432break;
3433}
3434break;
3435default:
3436break;
3437}
3438break;
3439case Arg::BitImm:
3440switch (opgenHiddenPtrIdentity(kinds)[1]) {
3441case Arg::Tmp:
3442switch (opgenHiddenPtrIdentity(kinds)[2]) {
3443case Arg::Tmp:
3444#if CPU(ARM64)
3445OPGEN_RETURN(true);
3446#endif
3447break;
3448break;
3449default:
3450break;
3451}
3452break;
3453default:
3454break;
3455}
3456break;
3457case Arg::Addr:
3458case Arg::Stack:
3459case Arg::CallArg:
3460switch (opgenHiddenPtrIdentity(kinds)[1]) {
3461case Arg::Tmp:
3462switch (opgenHiddenPtrIdentity(kinds)[2]) {
3463case Arg::Tmp:
3464#if CPU(X86) || CPU(X86_64)
3465OPGEN_RETURN(true);
3466#endif
3467break;
3468break;
3469default:
3470break;
3471}
3472break;
3473default:
3474break;
3475}
3476break;
3477default:
3478break;
3479}
3480break;
3481case 2:
3482switch (opgenHiddenPtrIdentity(kinds)[0]) {
3483case Arg::Tmp:
3484switch (opgenHiddenPtrIdentity(kinds)[1]) {
3485case Arg::Tmp:
3486OPGEN_RETURN(true);
3487break;
3488break;
3489case Arg::Addr:
3490case Arg::Stack:
3491case Arg::CallArg:
3492#if CPU(X86) || CPU(X86_64)
3493OPGEN_RETURN(true);
3494#endif
3495break;
3496break;
3497case Arg::Index:
3498#if CPU(X86) || CPU(X86_64)
3499OPGEN_RETURN(true);
3500#endif
3501break;
3502break;
3503default:
3504break;
3505}
3506break;
3507case Arg::Imm:
3508switch (opgenHiddenPtrIdentity(kinds)[1]) {
3509case Arg::Tmp:
3510#if CPU(X86) || CPU(X86_64)
3511OPGEN_RETURN(true);
3512#endif
3513break;
3514break;
3515case Arg::Addr:
3516case Arg::Stack:
3517case Arg::CallArg:
3518#if CPU(X86) || CPU(X86_64)
3519OPGEN_RETURN(true);
3520#endif
3521break;
3522break;
3523case Arg::Index:
3524#if CPU(X86) || CPU(X86_64)
3525OPGEN_RETURN(true);
3526#endif
3527break;
3528break;
3529default:
3530break;
3531}
3532break;
3533case Arg::Addr:
3534case Arg::Stack:
3535case Arg::CallArg:
3536switch (opgenHiddenPtrIdentity(kinds)[1]) {
3537case Arg::Tmp:
3538#if CPU(X86) || CPU(X86_64)
3539OPGEN_RETURN(true);
3540#endif
3541break;
3542break;
3543default:
3544break;
3545}
3546break;
3547case Arg::Index:
3548switch (opgenHiddenPtrIdentity(kinds)[1]) {
3549case Arg::Tmp:
3550#if CPU(X86) || CPU(X86_64)
3551OPGEN_RETURN(true);
3552#endif
3553break;
3554break;
3555default:
3556break;
3557}
3558break;
3559default:
3560break;
3561}
3562break;
3563default:
3564break;
3565}
3566break;
3567case Opcode::Or64:
3568switch (sizeof...(Arguments)) {
3569case 3:
3570switch (opgenHiddenPtrIdentity(kinds)[0]) {
3571case Arg::Tmp:
3572switch (opgenHiddenPtrIdentity(kinds)[1]) {
3573case Arg::Tmp:
3574switch (opgenHiddenPtrIdentity(kinds)[2]) {
3575case Arg::Tmp:
3576#if CPU(X86_64) || CPU(ARM64)
3577OPGEN_RETURN(true);
3578#endif
3579break;
3580break;
3581default:
3582break;
3583}
3584break;
3585default:
3586break;
3587}
3588break;
3589#if USE(JSVALUE64)
3590case Arg::BitImm64:
3591switch (opgenHiddenPtrIdentity(kinds)[1]) {
3592case Arg::Tmp:
3593switch (opgenHiddenPtrIdentity(kinds)[2]) {
3594case Arg::Tmp:
3595#if CPU(ARM64)
3596OPGEN_RETURN(true);
3597#endif
3598break;
3599break;
3600default:
3601break;
3602}
3603break;
3604default:
3605break;
3606}
3607break;
3608#endif // USE(JSVALUE64)
3609default:
3610break;
3611}
3612break;
3613case 2:
3614switch (opgenHiddenPtrIdentity(kinds)[0]) {
3615case Arg::Tmp:
3616switch (opgenHiddenPtrIdentity(kinds)[1]) {
3617case Arg::Tmp:
3618#if CPU(X86_64) || CPU(ARM64)
3619OPGEN_RETURN(true);
3620#endif
3621break;
3622break;
3623case Arg::Addr:
3624case Arg::Stack:
3625case Arg::CallArg:
3626#if CPU(X86_64)
3627OPGEN_RETURN(true);
3628#endif
3629break;
3630break;
3631case Arg::Index:
3632#if CPU(X86_64)
3633OPGEN_RETURN(true);
3634#endif
3635break;
3636break;
3637default:
3638break;
3639}
3640break;
3641case Arg::Imm:
3642switch (opgenHiddenPtrIdentity(kinds)[1]) {
3643case Arg::Tmp:
3644#if CPU(X86_64)
3645OPGEN_RETURN(true);
3646#endif
3647break;
3648break;
3649case Arg::Addr:
3650case Arg::Stack:
3651case Arg::CallArg:
3652#if CPU(X86_64)
3653OPGEN_RETURN(true);
3654#endif
3655break;
3656break;
3657case Arg::Index:
3658#if CPU(X86_64)
3659OPGEN_RETURN(true);
3660#endif
3661break;
3662break;
3663default:
3664break;
3665}
3666break;
3667case Arg::Addr:
3668case Arg::Stack:
3669case Arg::CallArg:
3670switch (opgenHiddenPtrIdentity(kinds)[1]) {
3671case Arg::Tmp:
3672#if CPU(X86_64)
3673OPGEN_RETURN(true);
3674#endif
3675break;
3676break;
3677default:
3678break;
3679}
3680break;
3681case Arg::Index:
3682switch (opgenHiddenPtrIdentity(kinds)[1]) {
3683case Arg::Tmp:
3684#if CPU(X86_64)
3685OPGEN_RETURN(true);
3686#endif
3687break;
3688break;
3689default:
3690break;
3691}
3692break;
3693default:
3694break;
3695}
3696break;
3697default:
3698break;
3699}
3700break;
3701case Opcode::Xor32:
3702switch (sizeof...(Arguments)) {
3703case 3:
3704switch (opgenHiddenPtrIdentity(kinds)[0]) {
3705case Arg::Tmp:
3706switch (opgenHiddenPtrIdentity(kinds)[1]) {
3707case Arg::Tmp:
3708switch (opgenHiddenPtrIdentity(kinds)[2]) {
3709case Arg::Tmp:
3710OPGEN_RETURN(true);
3711break;
3712break;
3713default:
3714break;
3715}
3716break;
3717case Arg::Addr:
3718case Arg::Stack:
3719case Arg::CallArg:
3720switch (opgenHiddenPtrIdentity(kinds)[2]) {
3721case Arg::Tmp:
3722#if CPU(X86) || CPU(X86_64)
3723OPGEN_RETURN(true);
3724#endif
3725break;
3726break;
3727default:
3728break;
3729}
3730break;
3731default:
3732break;
3733}
3734break;
3735case Arg::BitImm:
3736switch (opgenHiddenPtrIdentity(kinds)[1]) {
3737case Arg::Tmp:
3738switch (opgenHiddenPtrIdentity(kinds)[2]) {
3739case Arg::Tmp:
3740#if CPU(ARM64)
3741OPGEN_RETURN(true);
3742#endif
3743break;
3744break;
3745default:
3746break;
3747}
3748break;
3749default:
3750break;
3751}
3752break;
3753case Arg::Addr:
3754case Arg::Stack:
3755case Arg::CallArg:
3756switch (opgenHiddenPtrIdentity(kinds)[1]) {
3757case Arg::Tmp:
3758switch (opgenHiddenPtrIdentity(kinds)[2]) {
3759case Arg::Tmp:
3760#if CPU(X86) || CPU(X86_64)
3761OPGEN_RETURN(true);
3762#endif
3763break;
3764break;
3765default:
3766break;
3767}
3768break;
3769default:
3770break;
3771}
3772break;
3773default:
3774break;
3775}
3776break;
3777case 2:
3778switch (opgenHiddenPtrIdentity(kinds)[0]) {
3779case Arg::Tmp:
3780switch (opgenHiddenPtrIdentity(kinds)[1]) {
3781case Arg::Tmp:
3782OPGEN_RETURN(true);
3783break;
3784break;
3785case Arg::Addr:
3786case Arg::Stack:
3787case Arg::CallArg:
3788#if CPU(X86) || CPU(X86_64)
3789OPGEN_RETURN(true);
3790#endif
3791break;
3792break;
3793case Arg::Index:
3794#if CPU(X86) || CPU(X86_64)
3795OPGEN_RETURN(true);
3796#endif
3797break;
3798break;
3799default:
3800break;
3801}
3802break;
3803case Arg::Imm:
3804switch (opgenHiddenPtrIdentity(kinds)[1]) {
3805case Arg::Tmp:
3806#if CPU(X86) || CPU(X86_64)
3807OPGEN_RETURN(true);
3808#endif
3809break;
3810break;
3811case Arg::Addr:
3812case Arg::Stack:
3813case Arg::CallArg:
3814#if CPU(X86) || CPU(X86_64)
3815OPGEN_RETURN(true);
3816#endif
3817break;
3818break;
3819case Arg::Index:
3820#if CPU(X86) || CPU(X86_64)
3821OPGEN_RETURN(true);
3822#endif
3823break;
3824break;
3825default:
3826break;
3827}
3828break;
3829case Arg::Addr:
3830case Arg::Stack:
3831case Arg::CallArg:
3832switch (opgenHiddenPtrIdentity(kinds)[1]) {
3833case Arg::Tmp:
3834#if CPU(X86) || CPU(X86_64)
3835OPGEN_RETURN(true);
3836#endif
3837break;
3838break;
3839default:
3840break;
3841}
3842break;
3843case Arg::Index:
3844switch (opgenHiddenPtrIdentity(kinds)[1]) {
3845case Arg::Tmp:
3846#if CPU(X86) || CPU(X86_64)
3847OPGEN_RETURN(true);
3848#endif
3849break;
3850break;
3851default:
3852break;
3853}
3854break;
3855default:
3856break;
3857}
3858break;
3859default:
3860break;
3861}
3862break;
3863case Opcode::Xor64:
3864switch (sizeof...(Arguments)) {
3865case 3:
3866switch (opgenHiddenPtrIdentity(kinds)[0]) {
3867case Arg::Tmp:
3868switch (opgenHiddenPtrIdentity(kinds)[1]) {
3869case Arg::Tmp:
3870switch (opgenHiddenPtrIdentity(kinds)[2]) {
3871case Arg::Tmp:
3872#if CPU(X86_64) || CPU(ARM64)
3873OPGEN_RETURN(true);
3874#endif
3875break;
3876break;
3877default:
3878break;
3879}
3880break;
3881default:
3882break;
3883}
3884break;
3885#if USE(JSVALUE64)
3886case Arg::BitImm64:
3887switch (opgenHiddenPtrIdentity(kinds)[1]) {
3888case Arg::Tmp:
3889switch (opgenHiddenPtrIdentity(kinds)[2]) {
3890case Arg::Tmp:
3891#if CPU(ARM64)
3892OPGEN_RETURN(true);
3893#endif
3894break;
3895break;
3896default:
3897break;
3898}
3899break;
3900default:
3901break;
3902}
3903break;
3904#endif // USE(JSVALUE64)
3905default:
3906break;
3907}
3908break;
3909case 2:
3910switch (opgenHiddenPtrIdentity(kinds)[0]) {
3911case Arg::Tmp:
3912switch (opgenHiddenPtrIdentity(kinds)[1]) {
3913case Arg::Tmp:
3914#if CPU(X86_64) || CPU(ARM64)
3915OPGEN_RETURN(true);
3916#endif
3917break;
3918break;
3919case Arg::Addr:
3920case Arg::Stack:
3921case Arg::CallArg:
3922#if CPU(X86_64)
3923OPGEN_RETURN(true);
3924#endif
3925break;
3926break;
3927case Arg::Index:
3928#if CPU(X86_64)
3929OPGEN_RETURN(true);
3930#endif
3931break;
3932break;
3933default:
3934break;
3935}
3936break;
3937case Arg::Addr:
3938case Arg::Stack:
3939case Arg::CallArg:
3940switch (opgenHiddenPtrIdentity(kinds)[1]) {
3941case Arg::Tmp:
3942#if CPU(X86_64)
3943OPGEN_RETURN(true);
3944#endif
3945break;
3946break;
3947default:
3948break;
3949}
3950break;
3951case Arg::Index:
3952switch (opgenHiddenPtrIdentity(kinds)[1]) {
3953case Arg::Tmp:
3954#if CPU(X86_64)
3955OPGEN_RETURN(true);
3956#endif
3957break;
3958break;
3959default:
3960break;
3961}
3962break;
3963case Arg::Imm:
3964switch (opgenHiddenPtrIdentity(kinds)[1]) {
3965case Arg::Addr:
3966case Arg::Stack:
3967case Arg::CallArg:
3968#if CPU(X86_64)
3969OPGEN_RETURN(true);
3970#endif
3971break;
3972break;
3973case Arg::Index:
3974#if CPU(X86_64)
3975OPGEN_RETURN(true);
3976#endif
3977break;
3978break;
3979case Arg::Tmp:
3980#if CPU(X86_64)
3981OPGEN_RETURN(true);
3982#endif
3983break;
3984break;
3985default:
3986break;
3987}
3988break;
3989default:
3990break;
3991}
3992break;
3993default:
3994break;
3995}
3996break;
3997case Opcode::Not32:
3998switch (sizeof...(Arguments)) {
3999case 2:
4000switch (opgenHiddenPtrIdentity(kinds)[0]) {
4001case Arg::Tmp:
4002switch (opgenHiddenPtrIdentity(kinds)[1]) {
4003case Arg::Tmp:
4004#if CPU(ARM64)
4005OPGEN_RETURN(true);
4006#endif
4007break;
4008break;
4009default:
4010break;
4011}
4012break;
4013default:
4014break;
4015}
4016break;
4017case 1:
4018switch (opgenHiddenPtrIdentity(kinds)[0]) {
4019case Arg::Tmp:
4020#if CPU(X86) || CPU(X86_64)
4021OPGEN_RETURN(true);
4022#endif
4023break;
4024break;
4025case Arg::Addr:
4026case Arg::Stack:
4027case Arg::CallArg:
4028#if CPU(X86) || CPU(X86_64)
4029OPGEN_RETURN(true);
4030#endif
4031break;
4032break;
4033case Arg::Index:
4034#if CPU(X86) || CPU(X86_64)
4035OPGEN_RETURN(true);
4036#endif
4037break;
4038break;
4039default:
4040break;
4041}
4042break;
4043default:
4044break;
4045}
4046break;
4047case Opcode::Not64:
4048switch (sizeof...(Arguments)) {
4049case 2:
4050switch (opgenHiddenPtrIdentity(kinds)[0]) {
4051case Arg::Tmp:
4052switch (opgenHiddenPtrIdentity(kinds)[1]) {
4053case Arg::Tmp:
4054#if CPU(ARM64)
4055OPGEN_RETURN(true);
4056#endif
4057break;
4058break;
4059default:
4060break;
4061}
4062break;
4063default:
4064break;
4065}
4066break;
4067case 1:
4068switch (opgenHiddenPtrIdentity(kinds)[0]) {
4069case Arg::Tmp:
4070#if CPU(X86_64)
4071OPGEN_RETURN(true);
4072#endif
4073break;
4074break;
4075case Arg::Addr:
4076case Arg::Stack:
4077case Arg::CallArg:
4078#if CPU(X86_64)
4079OPGEN_RETURN(true);
4080#endif
4081break;
4082break;
4083case Arg::Index:
4084#if CPU(X86_64)
4085OPGEN_RETURN(true);
4086#endif
4087break;
4088break;
4089default:
4090break;
4091}
4092break;
4093default:
4094break;
4095}
4096break;
4097case Opcode::AbsDouble:
4098switch (sizeof...(Arguments)) {
4099case 2:
4100switch (opgenHiddenPtrIdentity(kinds)[0]) {
4101case Arg::Tmp:
4102switch (opgenHiddenPtrIdentity(kinds)[1]) {
4103case Arg::Tmp:
4104#if CPU(ARM64)
4105OPGEN_RETURN(true);
4106#endif
4107break;
4108break;
4109default:
4110break;
4111}
4112break;
4113default:
4114break;
4115}
4116break;
4117default:
4118break;
4119}
4120break;
4121case Opcode::AbsFloat:
4122switch (sizeof...(Arguments)) {
4123case 2:
4124switch (opgenHiddenPtrIdentity(kinds)[0]) {
4125case Arg::Tmp:
4126switch (opgenHiddenPtrIdentity(kinds)[1]) {
4127case Arg::Tmp:
4128#if CPU(ARM64)
4129OPGEN_RETURN(true);
4130#endif
4131break;
4132break;
4133default:
4134break;
4135}
4136break;
4137default:
4138break;
4139}
4140break;
4141default:
4142break;
4143}
4144break;
4145case Opcode::CeilDouble:
4146switch (sizeof...(Arguments)) {
4147case 2:
4148switch (opgenHiddenPtrIdentity(kinds)[0]) {
4149case Arg::Tmp:
4150switch (opgenHiddenPtrIdentity(kinds)[1]) {
4151case Arg::Tmp:
4152OPGEN_RETURN(true);
4153break;
4154break;
4155default:
4156break;
4157}
4158break;
4159case Arg::Addr:
4160case Arg::Stack:
4161case Arg::CallArg:
4162switch (opgenHiddenPtrIdentity(kinds)[1]) {
4163case Arg::Tmp:
4164#if CPU(X86) || CPU(X86_64)
4165OPGEN_RETURN(true);
4166#endif
4167break;
4168break;
4169default:
4170break;
4171}
4172break;
4173default:
4174break;
4175}
4176break;
4177default:
4178break;
4179}
4180break;
4181case Opcode::CeilFloat:
4182switch (sizeof...(Arguments)) {
4183case 2:
4184switch (opgenHiddenPtrIdentity(kinds)[0]) {
4185case Arg::Tmp:
4186switch (opgenHiddenPtrIdentity(kinds)[1]) {
4187case Arg::Tmp:
4188OPGEN_RETURN(true);
4189break;
4190break;
4191default:
4192break;
4193}
4194break;
4195case Arg::Addr:
4196case Arg::Stack:
4197case Arg::CallArg:
4198switch (opgenHiddenPtrIdentity(kinds)[1]) {
4199case Arg::Tmp:
4200#if CPU(X86) || CPU(X86_64)
4201OPGEN_RETURN(true);
4202#endif
4203break;
4204break;
4205default:
4206break;
4207}
4208break;
4209default:
4210break;
4211}
4212break;
4213default:
4214break;
4215}
4216break;
4217case Opcode::FloorDouble:
4218switch (sizeof...(Arguments)) {
4219case 2:
4220switch (opgenHiddenPtrIdentity(kinds)[0]) {
4221case Arg::Tmp:
4222switch (opgenHiddenPtrIdentity(kinds)[1]) {
4223case Arg::Tmp:
4224OPGEN_RETURN(true);
4225break;
4226break;
4227default:
4228break;
4229}
4230break;
4231case Arg::Addr:
4232case Arg::Stack:
4233case Arg::CallArg:
4234switch (opgenHiddenPtrIdentity(kinds)[1]) {
4235case Arg::Tmp:
4236#if CPU(X86) || CPU(X86_64)
4237OPGEN_RETURN(true);
4238#endif
4239break;
4240break;
4241default:
4242break;
4243}
4244break;
4245default:
4246break;
4247}
4248break;
4249default:
4250break;
4251}
4252break;
4253case Opcode::FloorFloat:
4254switch (sizeof...(Arguments)) {
4255case 2:
4256switch (opgenHiddenPtrIdentity(kinds)[0]) {
4257case Arg::Tmp:
4258switch (opgenHiddenPtrIdentity(kinds)[1]) {
4259case Arg::Tmp:
4260OPGEN_RETURN(true);
4261break;
4262break;
4263default:
4264break;
4265}
4266break;
4267case Arg::Addr:
4268case Arg::Stack:
4269case Arg::CallArg:
4270switch (opgenHiddenPtrIdentity(kinds)[1]) {
4271case Arg::Tmp:
4272#if CPU(X86) || CPU(X86_64)
4273OPGEN_RETURN(true);
4274#endif
4275break;
4276break;
4277default:
4278break;
4279}
4280break;
4281default:
4282break;
4283}
4284break;
4285default:
4286break;
4287}
4288break;
4289case Opcode::SqrtDouble:
4290switch (sizeof...(Arguments)) {
4291case 2:
4292switch (opgenHiddenPtrIdentity(kinds)[0]) {
4293case Arg::Tmp:
4294switch (opgenHiddenPtrIdentity(kinds)[1]) {
4295case Arg::Tmp:
4296OPGEN_RETURN(true);
4297break;
4298break;
4299default:
4300break;
4301}
4302break;
4303case Arg::Addr:
4304case Arg::Stack:
4305case Arg::CallArg:
4306switch (opgenHiddenPtrIdentity(kinds)[1]) {
4307case Arg::Tmp:
4308#if CPU(X86) || CPU(X86_64)
4309OPGEN_RETURN(true);
4310#endif
4311break;
4312break;
4313default:
4314break;
4315}
4316break;
4317default:
4318break;
4319}
4320break;
4321default:
4322break;
4323}
4324break;
4325case Opcode::SqrtFloat:
4326switch (sizeof...(Arguments)) {
4327case 2:
4328switch (opgenHiddenPtrIdentity(kinds)[0]) {
4329case Arg::Tmp:
4330switch (opgenHiddenPtrIdentity(kinds)[1]) {
4331case Arg::Tmp:
4332OPGEN_RETURN(true);
4333break;
4334break;
4335default:
4336break;
4337}
4338break;
4339case Arg::Addr:
4340case Arg::Stack:
4341case Arg::CallArg:
4342switch (opgenHiddenPtrIdentity(kinds)[1]) {
4343case Arg::Tmp:
4344#if CPU(X86) || CPU(X86_64)
4345OPGEN_RETURN(true);
4346#endif
4347break;
4348break;
4349default:
4350break;
4351}
4352break;
4353default:
4354break;
4355}
4356break;
4357default:
4358break;
4359}
4360break;
4361case Opcode::ConvertInt32ToDouble:
4362switch (sizeof...(Arguments)) {
4363case 2:
4364switch (opgenHiddenPtrIdentity(kinds)[0]) {
4365case Arg::Tmp:
4366switch (opgenHiddenPtrIdentity(kinds)[1]) {
4367case Arg::Tmp:
4368OPGEN_RETURN(true);
4369break;
4370break;
4371default:
4372break;
4373}
4374break;
4375case Arg::Addr:
4376case Arg::Stack:
4377case Arg::CallArg:
4378switch (opgenHiddenPtrIdentity(kinds)[1]) {
4379case Arg::Tmp:
4380#if CPU(X86) || CPU(X86_64)
4381OPGEN_RETURN(true);
4382#endif
4383break;
4384break;
4385default:
4386break;
4387}
4388break;
4389default:
4390break;
4391}
4392break;
4393default:
4394break;
4395}
4396break;
4397case Opcode::ConvertInt64ToDouble:
4398switch (sizeof...(Arguments)) {
4399case 2:
4400switch (opgenHiddenPtrIdentity(kinds)[0]) {
4401case Arg::Tmp:
4402switch (opgenHiddenPtrIdentity(kinds)[1]) {
4403case Arg::Tmp:
4404#if CPU(X86_64) || CPU(ARM64)
4405OPGEN_RETURN(true);
4406#endif
4407break;
4408break;
4409default:
4410break;
4411}
4412break;
4413case Arg::Addr:
4414case Arg::Stack:
4415case Arg::CallArg:
4416switch (opgenHiddenPtrIdentity(kinds)[1]) {
4417case Arg::Tmp:
4418#if CPU(X86_64)
4419OPGEN_RETURN(true);
4420#endif
4421break;
4422break;
4423default:
4424break;
4425}
4426break;
4427default:
4428break;
4429}
4430break;
4431default:
4432break;
4433}
4434break;
4435case Opcode::ConvertInt32ToFloat:
4436switch (sizeof...(Arguments)) {
4437case 2:
4438switch (opgenHiddenPtrIdentity(kinds)[0]) {
4439case Arg::Tmp:
4440switch (opgenHiddenPtrIdentity(kinds)[1]) {
4441case Arg::Tmp:
4442OPGEN_RETURN(true);
4443break;
4444break;
4445default:
4446break;
4447}
4448break;
4449case Arg::Addr:
4450case Arg::Stack:
4451case Arg::CallArg:
4452switch (opgenHiddenPtrIdentity(kinds)[1]) {
4453case Arg::Tmp:
4454#if CPU(X86) || CPU(X86_64)
4455OPGEN_RETURN(true);
4456#endif
4457break;
4458break;
4459default:
4460break;
4461}
4462break;
4463default:
4464break;
4465}
4466break;
4467default:
4468break;
4469}
4470break;
4471case Opcode::ConvertInt64ToFloat:
4472switch (sizeof...(Arguments)) {
4473case 2:
4474switch (opgenHiddenPtrIdentity(kinds)[0]) {
4475case Arg::Tmp:
4476switch (opgenHiddenPtrIdentity(kinds)[1]) {
4477case Arg::Tmp:
4478#if CPU(X86_64) || CPU(ARM64)
4479OPGEN_RETURN(true);
4480#endif
4481break;
4482break;
4483default:
4484break;
4485}
4486break;
4487case Arg::Addr:
4488case Arg::Stack:
4489case Arg::CallArg:
4490switch (opgenHiddenPtrIdentity(kinds)[1]) {
4491case Arg::Tmp:
4492#if CPU(X86_64)
4493OPGEN_RETURN(true);
4494#endif
4495break;
4496break;
4497default:
4498break;
4499}
4500break;
4501default:
4502break;
4503}
4504break;
4505default:
4506break;
4507}
4508break;
4509case Opcode::CountLeadingZeros32:
4510switch (sizeof...(Arguments)) {
4511case 2:
4512switch (opgenHiddenPtrIdentity(kinds)[0]) {
4513case Arg::Tmp:
4514switch (opgenHiddenPtrIdentity(kinds)[1]) {
4515case Arg::Tmp:
4516OPGEN_RETURN(true);
4517break;
4518break;
4519default:
4520break;
4521}
4522break;
4523case Arg::Addr:
4524case Arg::Stack:
4525case Arg::CallArg:
4526switch (opgenHiddenPtrIdentity(kinds)[1]) {
4527case Arg::Tmp:
4528#if CPU(X86) || CPU(X86_64)
4529OPGEN_RETURN(true);
4530#endif
4531break;
4532break;
4533default:
4534break;
4535}
4536break;
4537default:
4538break;
4539}
4540break;
4541default:
4542break;
4543}
4544break;
4545case Opcode::CountLeadingZeros64:
4546switch (sizeof...(Arguments)) {
4547case 2:
4548switch (opgenHiddenPtrIdentity(kinds)[0]) {
4549case Arg::Tmp:
4550switch (opgenHiddenPtrIdentity(kinds)[1]) {
4551case Arg::Tmp:
4552#if CPU(X86_64) || CPU(ARM64)
4553OPGEN_RETURN(true);
4554#endif
4555break;
4556break;
4557default:
4558break;
4559}
4560break;
4561case Arg::Addr:
4562case Arg::Stack:
4563case Arg::CallArg:
4564switch (opgenHiddenPtrIdentity(kinds)[1]) {
4565case Arg::Tmp:
4566#if CPU(X86_64)
4567OPGEN_RETURN(true);
4568#endif
4569break;
4570break;
4571default:
4572break;
4573}
4574break;
4575default:
4576break;
4577}
4578break;
4579default:
4580break;
4581}
4582break;
4583case Opcode::ConvertDoubleToFloat:
4584switch (sizeof...(Arguments)) {
4585case 2:
4586switch (opgenHiddenPtrIdentity(kinds)[0]) {
4587case Arg::Tmp:
4588switch (opgenHiddenPtrIdentity(kinds)[1]) {
4589case Arg::Tmp:
4590OPGEN_RETURN(true);
4591break;
4592break;
4593default:
4594break;
4595}
4596break;
4597case Arg::Addr:
4598case Arg::Stack:
4599case Arg::CallArg:
4600switch (opgenHiddenPtrIdentity(kinds)[1]) {
4601case Arg::Tmp:
4602#if CPU(X86) || CPU(X86_64)
4603OPGEN_RETURN(true);
4604#endif
4605break;
4606break;
4607default:
4608break;
4609}
4610break;
4611default:
4612break;
4613}
4614break;
4615default:
4616break;
4617}
4618break;
4619case Opcode::ConvertFloatToDouble:
4620switch (sizeof...(Arguments)) {
4621case 2:
4622switch (opgenHiddenPtrIdentity(kinds)[0]) {
4623case Arg::Tmp:
4624switch (opgenHiddenPtrIdentity(kinds)[1]) {
4625case Arg::Tmp:
4626OPGEN_RETURN(true);
4627break;
4628break;
4629default:
4630break;
4631}
4632break;
4633case Arg::Addr:
4634case Arg::Stack:
4635case Arg::CallArg:
4636switch (opgenHiddenPtrIdentity(kinds)[1]) {
4637case Arg::Tmp:
4638#if CPU(X86) || CPU(X86_64)
4639OPGEN_RETURN(true);
4640#endif
4641break;
4642break;
4643default:
4644break;
4645}
4646break;
4647default:
4648break;
4649}
4650break;
4651default:
4652break;
4653}
4654break;
4655case Opcode::Move:
4656switch (sizeof...(Arguments)) {
4657case 2:
4658switch (opgenHiddenPtrIdentity(kinds)[0]) {
4659case Arg::Tmp:
4660switch (opgenHiddenPtrIdentity(kinds)[1]) {
4661case Arg::Tmp:
4662OPGEN_RETURN(true);
4663break;
4664break;
4665case Arg::Addr:
4666case Arg::Stack:
4667case Arg::CallArg:
4668OPGEN_RETURN(true);
4669break;
4670break;
4671case Arg::Index:
4672OPGEN_RETURN(true);
4673break;
4674break;
4675default:
4676break;
4677}
4678break;
4679case Arg::Imm:
4680switch (opgenHiddenPtrIdentity(kinds)[1]) {
4681case Arg::Tmp:
4682OPGEN_RETURN(true);
4683break;
4684break;
4685case Arg::Addr:
4686case Arg::Stack:
4687case Arg::CallArg:
4688#if CPU(X86) || CPU(X86_64)
4689OPGEN_RETURN(true);
4690#endif
4691break;
4692break;
4693default:
4694break;
4695}
4696break;
4697#if USE(JSVALUE64)
4698case Arg::BigImm:
4699switch (opgenHiddenPtrIdentity(kinds)[1]) {
4700case Arg::Tmp:
4701OPGEN_RETURN(true);
4702break;
4703break;
4704default:
4705break;
4706}
4707break;
4708#endif // USE(JSVALUE64)
4709case Arg::Addr:
4710case Arg::Stack:
4711case Arg::CallArg:
4712switch (opgenHiddenPtrIdentity(kinds)[1]) {
4713case Arg::Tmp:
4714OPGEN_RETURN(true);
4715break;
4716break;
4717default:
4718break;
4719}
4720break;
4721case Arg::Index:
4722switch (opgenHiddenPtrIdentity(kinds)[1]) {
4723case Arg::Tmp:
4724OPGEN_RETURN(true);
4725break;
4726break;
4727default:
4728break;
4729}
4730break;
4731default:
4732break;
4733}
4734break;
4735case 3:
4736switch (opgenHiddenPtrIdentity(kinds)[0]) {
4737case Arg::Addr:
4738case Arg::Stack:
4739case Arg::CallArg:
4740switch (opgenHiddenPtrIdentity(kinds)[1]) {
4741case Arg::Addr:
4742case Arg::Stack:
4743case Arg::CallArg:
4744switch (opgenHiddenPtrIdentity(kinds)[2]) {
4745case Arg::Tmp:
4746OPGEN_RETURN(true);
4747break;
4748break;
4749default:
4750break;
4751}
4752break;
4753default:
4754break;
4755}
4756break;
4757default:
4758break;
4759}
4760break;
4761default:
4762break;
4763}
4764break;
4765case Opcode::Swap32:
4766switch (sizeof...(Arguments)) {
4767case 2:
4768switch (opgenHiddenPtrIdentity(kinds)[0]) {
4769case Arg::Tmp:
4770switch (opgenHiddenPtrIdentity(kinds)[1]) {
4771case Arg::Tmp:
4772#if CPU(X86) || CPU(X86_64)
4773OPGEN_RETURN(true);
4774#endif
4775break;
4776break;
4777case Arg::Addr:
4778case Arg::Stack:
4779case Arg::CallArg:
4780#if CPU(X86) || CPU(X86_64)
4781OPGEN_RETURN(true);
4782#endif
4783break;
4784break;
4785default:
4786break;
4787}
4788break;
4789default:
4790break;
4791}
4792break;
4793default:
4794break;
4795}
4796break;
4797case Opcode::Swap64:
4798switch (sizeof...(Arguments)) {
4799case 2:
4800switch (opgenHiddenPtrIdentity(kinds)[0]) {
4801case Arg::Tmp:
4802switch (opgenHiddenPtrIdentity(kinds)[1]) {
4803case Arg::Tmp:
4804#if CPU(X86_64)
4805OPGEN_RETURN(true);
4806#endif
4807break;
4808break;
4809case Arg::Addr:
4810case Arg::Stack:
4811case Arg::CallArg:
4812#if CPU(X86_64)
4813OPGEN_RETURN(true);
4814#endif
4815break;
4816break;
4817default:
4818break;
4819}
4820break;
4821default:
4822break;
4823}
4824break;
4825default:
4826break;
4827}
4828break;
4829case Opcode::Move32:
4830switch (sizeof...(Arguments)) {
4831case 2:
4832switch (opgenHiddenPtrIdentity(kinds)[0]) {
4833case Arg::Tmp:
4834switch (opgenHiddenPtrIdentity(kinds)[1]) {
4835case Arg::Tmp:
4836OPGEN_RETURN(true);
4837break;
4838break;
4839case Arg::Addr:
4840case Arg::Stack:
4841case Arg::CallArg:
4842OPGEN_RETURN(true);
4843break;
4844break;
4845case Arg::Index:
4846OPGEN_RETURN(true);
4847break;
4848break;
4849default:
4850break;
4851}
4852break;
4853case Arg::Addr:
4854case Arg::Stack:
4855case Arg::CallArg:
4856switch (opgenHiddenPtrIdentity(kinds)[1]) {
4857case Arg::Tmp:
4858OPGEN_RETURN(true);
4859break;
4860break;
4861default:
4862break;
4863}
4864break;
4865case Arg::Index:
4866switch (opgenHiddenPtrIdentity(kinds)[1]) {
4867case Arg::Tmp:
4868OPGEN_RETURN(true);
4869break;
4870break;
4871default:
4872break;
4873}
4874break;
4875case Arg::Imm:
4876switch (opgenHiddenPtrIdentity(kinds)[1]) {
4877case Arg::Tmp:
4878#if CPU(X86) || CPU(X86_64)
4879OPGEN_RETURN(true);
4880#endif
4881break;
4882break;
4883case Arg::Addr:
4884case Arg::Stack:
4885case Arg::CallArg:
4886#if CPU(X86) || CPU(X86_64)
4887OPGEN_RETURN(true);
4888#endif
4889break;
4890break;
4891case Arg::Index:
4892#if CPU(X86) || CPU(X86_64)
4893OPGEN_RETURN(true);
4894#endif
4895break;
4896break;
4897default:
4898break;
4899}
4900break;
4901default:
4902break;
4903}
4904break;
4905case 3:
4906switch (opgenHiddenPtrIdentity(kinds)[0]) {
4907case Arg::Addr:
4908case Arg::Stack:
4909case Arg::CallArg:
4910switch (opgenHiddenPtrIdentity(kinds)[1]) {
4911case Arg::Addr:
4912case Arg::Stack:
4913case Arg::CallArg:
4914switch (opgenHiddenPtrIdentity(kinds)[2]) {
4915case Arg::Tmp:
4916OPGEN_RETURN(true);
4917break;
4918break;
4919default:
4920break;
4921}
4922break;
4923default:
4924break;
4925}
4926break;
4927default:
4928break;
4929}
4930break;
4931default:
4932break;
4933}
4934break;
4935case Opcode::StoreZero32:
4936switch (sizeof...(Arguments)) {
4937case 1:
4938switch (opgenHiddenPtrIdentity(kinds)[0]) {
4939case Arg::Addr:
4940case Arg::Stack:
4941case Arg::CallArg:
4942OPGEN_RETURN(true);
4943break;
4944break;
4945case Arg::Index:
4946OPGEN_RETURN(true);
4947break;
4948break;
4949default:
4950break;
4951}
4952break;
4953default:
4954break;
4955}
4956break;
4957case Opcode::StoreZero64:
4958switch (sizeof...(Arguments)) {
4959case 1:
4960switch (opgenHiddenPtrIdentity(kinds)[0]) {
4961case Arg::Addr:
4962case Arg::Stack:
4963case Arg::CallArg:
4964#if CPU(X86_64) || CPU(ARM64)
4965OPGEN_RETURN(true);
4966#endif
4967break;
4968break;
4969case Arg::Index:
4970#if CPU(X86_64) || CPU(ARM64)
4971OPGEN_RETURN(true);
4972#endif
4973break;
4974break;
4975default:
4976break;
4977}
4978break;
4979default:
4980break;
4981}
4982break;
4983case Opcode::SignExtend32ToPtr:
4984switch (sizeof...(Arguments)) {
4985case 2:
4986switch (opgenHiddenPtrIdentity(kinds)[0]) {
4987case Arg::Tmp:
4988switch (opgenHiddenPtrIdentity(kinds)[1]) {
4989case Arg::Tmp:
4990OPGEN_RETURN(true);
4991break;
4992break;
4993default:
4994break;
4995}
4996break;
4997default:
4998break;
4999}
5000break;
5001default:
5002break;
5003}
5004break;
5005case Opcode::ZeroExtend8To32:
5006switch (sizeof...(Arguments)) {
5007case 2:
5008switch (opgenHiddenPtrIdentity(kinds)[0]) {
5009case Arg::Tmp:
5010switch (opgenHiddenPtrIdentity(kinds)[1]) {
5011case Arg::Tmp:
5012OPGEN_RETURN(true);
5013break;
5014break;
5015default:
5016break;
5017}
5018break;
5019case Arg::Addr:
5020case Arg::Stack:
5021case Arg::CallArg:
5022switch (opgenHiddenPtrIdentity(kinds)[1]) {
5023case Arg::Tmp:
5024#if CPU(X86) || CPU(X86_64)
5025OPGEN_RETURN(true);
5026#endif
5027break;
5028break;
5029default:
5030break;
5031}
5032break;
5033case Arg::Index:
5034switch (opgenHiddenPtrIdentity(kinds)[1]) {
5035case Arg::Tmp:
5036#if CPU(X86) || CPU(X86_64)
5037OPGEN_RETURN(true);
5038#endif
5039break;
5040break;
5041default:
5042break;
5043}
5044break;
5045default:
5046break;
5047}
5048break;
5049default:
5050break;
5051}
5052break;
5053case Opcode::SignExtend8To32:
5054switch (sizeof...(Arguments)) {
5055case 2:
5056switch (opgenHiddenPtrIdentity(kinds)[0]) {
5057case Arg::Tmp:
5058switch (opgenHiddenPtrIdentity(kinds)[1]) {
5059case Arg::Tmp:
5060OPGEN_RETURN(true);
5061break;
5062break;
5063default:
5064break;
5065}
5066break;
5067case Arg::Addr:
5068case Arg::Stack:
5069case Arg::CallArg:
5070switch (opgenHiddenPtrIdentity(kinds)[1]) {
5071case Arg::Tmp:
5072#if CPU(X86) || CPU(X86_64)
5073OPGEN_RETURN(true);
5074#endif
5075break;
5076break;
5077default:
5078break;
5079}
5080break;
5081case Arg::Index:
5082switch (opgenHiddenPtrIdentity(kinds)[1]) {
5083case Arg::Tmp:
5084#if CPU(X86) || CPU(X86_64)
5085OPGEN_RETURN(true);
5086#endif
5087break;
5088break;
5089default:
5090break;
5091}
5092break;
5093default:
5094break;
5095}
5096break;
5097default:
5098break;
5099}
5100break;
5101case Opcode::ZeroExtend16To32:
5102switch (sizeof...(Arguments)) {
5103case 2:
5104switch (opgenHiddenPtrIdentity(kinds)[0]) {
5105case Arg::Tmp:
5106switch (opgenHiddenPtrIdentity(kinds)[1]) {
5107case Arg::Tmp:
5108OPGEN_RETURN(true);
5109break;
5110break;
5111default:
5112break;
5113}
5114break;
5115case Arg::Addr:
5116case Arg::Stack:
5117case Arg::CallArg:
5118switch (opgenHiddenPtrIdentity(kinds)[1]) {
5119case Arg::Tmp:
5120#if CPU(X86) || CPU(X86_64)
5121OPGEN_RETURN(true);
5122#endif
5123break;
5124break;
5125default:
5126break;
5127}
5128break;
5129case Arg::Index:
5130switch (opgenHiddenPtrIdentity(kinds)[1]) {
5131case Arg::Tmp:
5132#if CPU(X86) || CPU(X86_64)
5133OPGEN_RETURN(true);
5134#endif
5135break;
5136break;
5137default:
5138break;
5139}
5140break;
5141default:
5142break;
5143}
5144break;
5145default:
5146break;
5147}
5148break;
5149case Opcode::SignExtend16To32:
5150switch (sizeof...(Arguments)) {
5151case 2:
5152switch (opgenHiddenPtrIdentity(kinds)[0]) {
5153case Arg::Tmp:
5154switch (opgenHiddenPtrIdentity(kinds)[1]) {
5155case Arg::Tmp:
5156OPGEN_RETURN(true);
5157break;
5158break;
5159default:
5160break;
5161}
5162break;
5163case Arg::Addr:
5164case Arg::Stack:
5165case Arg::CallArg:
5166switch (opgenHiddenPtrIdentity(kinds)[1]) {
5167case Arg::Tmp:
5168#if CPU(X86) || CPU(X86_64)
5169OPGEN_RETURN(true);
5170#endif
5171break;
5172break;
5173default:
5174break;
5175}
5176break;
5177case Arg::Index:
5178switch (opgenHiddenPtrIdentity(kinds)[1]) {
5179case Arg::Tmp:
5180#if CPU(X86) || CPU(X86_64)
5181OPGEN_RETURN(true);
5182#endif
5183break;
5184break;
5185default:
5186break;
5187}
5188break;
5189default:
5190break;
5191}
5192break;
5193default:
5194break;
5195}
5196break;
5197case Opcode::MoveFloat:
5198switch (sizeof...(Arguments)) {
5199case 2:
5200switch (opgenHiddenPtrIdentity(kinds)[0]) {
5201case Arg::Tmp:
5202switch (opgenHiddenPtrIdentity(kinds)[1]) {
5203case Arg::Tmp:
5204OPGEN_RETURN(true);
5205break;
5206break;
5207case Arg::Addr:
5208case Arg::Stack:
5209case Arg::CallArg:
5210OPGEN_RETURN(true);
5211break;
5212break;
5213case Arg::Index:
5214OPGEN_RETURN(true);
5215break;
5216break;
5217default:
5218break;
5219}
5220break;
5221case Arg::Addr:
5222case Arg::Stack:
5223case Arg::CallArg:
5224switch (opgenHiddenPtrIdentity(kinds)[1]) {
5225case Arg::Tmp:
5226OPGEN_RETURN(true);
5227break;
5228break;
5229default:
5230break;
5231}
5232break;
5233case Arg::Index:
5234switch (opgenHiddenPtrIdentity(kinds)[1]) {
5235case Arg::Tmp:
5236OPGEN_RETURN(true);
5237break;
5238break;
5239default:
5240break;
5241}
5242break;
5243default:
5244break;
5245}
5246break;
5247case 3:
5248switch (opgenHiddenPtrIdentity(kinds)[0]) {
5249case Arg::Addr:
5250case Arg::Stack:
5251case Arg::CallArg:
5252switch (opgenHiddenPtrIdentity(kinds)[1]) {
5253case Arg::Addr:
5254case Arg::Stack:
5255case Arg::CallArg:
5256switch (opgenHiddenPtrIdentity(kinds)[2]) {
5257case Arg::Tmp:
5258OPGEN_RETURN(true);
5259break;
5260break;
5261default:
5262break;
5263}
5264break;
5265default:
5266break;
5267}
5268break;
5269default:
5270break;
5271}
5272break;
5273default:
5274break;
5275}
5276break;
5277case Opcode::MoveDouble:
5278switch (sizeof...(Arguments)) {
5279case 2:
5280switch (opgenHiddenPtrIdentity(kinds)[0]) {
5281case Arg::Tmp:
5282switch (opgenHiddenPtrIdentity(kinds)[1]) {
5283case Arg::Tmp:
5284OPGEN_RETURN(true);
5285break;
5286break;
5287case Arg::Addr:
5288case Arg::Stack:
5289case Arg::CallArg:
5290OPGEN_RETURN(true);
5291break;
5292break;
5293case Arg::Index:
5294OPGEN_RETURN(true);
5295break;
5296break;
5297default:
5298break;
5299}
5300break;
5301case Arg::Addr:
5302case Arg::Stack:
5303case Arg::CallArg:
5304switch (opgenHiddenPtrIdentity(kinds)[1]) {
5305case Arg::Tmp:
5306OPGEN_RETURN(true);
5307break;
5308break;
5309default:
5310break;
5311}
5312break;
5313case Arg::Index:
5314switch (opgenHiddenPtrIdentity(kinds)[1]) {
5315case Arg::Tmp:
5316OPGEN_RETURN(true);
5317break;
5318break;
5319default:
5320break;
5321}
5322break;
5323default:
5324break;
5325}
5326break;
5327case 3:
5328switch (opgenHiddenPtrIdentity(kinds)[0]) {
5329case Arg::Addr:
5330case Arg::Stack:
5331case Arg::CallArg:
5332switch (opgenHiddenPtrIdentity(kinds)[1]) {
5333case Arg::Addr:
5334case Arg::Stack:
5335case Arg::CallArg:
5336switch (opgenHiddenPtrIdentity(kinds)[2]) {
5337case Arg::Tmp:
5338OPGEN_RETURN(true);
5339break;
5340break;
5341default:
5342break;
5343}
5344break;
5345default:
5346break;
5347}
5348break;
5349default:
5350break;
5351}
5352break;
5353default:
5354break;
5355}
5356break;
5357case Opcode::MoveZeroToDouble:
5358switch (sizeof...(Arguments)) {
5359case 1:
5360switch (opgenHiddenPtrIdentity(kinds)[0]) {
5361case Arg::Tmp:
5362OPGEN_RETURN(true);
5363break;
5364break;
5365default:
5366break;
5367}
5368break;
5369default:
5370break;
5371}
5372break;
5373case Opcode::Move64ToDouble:
5374switch (sizeof...(Arguments)) {
5375case 2:
5376switch (opgenHiddenPtrIdentity(kinds)[0]) {
5377case Arg::Tmp:
5378switch (opgenHiddenPtrIdentity(kinds)[1]) {
5379case Arg::Tmp:
5380#if CPU(X86_64) || CPU(ARM64)
5381OPGEN_RETURN(true);
5382#endif
5383break;
5384break;
5385default:
5386break;
5387}
5388break;
5389case Arg::Addr:
5390case Arg::Stack:
5391case Arg::CallArg:
5392switch (opgenHiddenPtrIdentity(kinds)[1]) {
5393case Arg::Tmp:
5394#if CPU(X86_64)
5395OPGEN_RETURN(true);
5396#endif
5397break;
5398break;
5399default:
5400break;
5401}
5402break;
5403case Arg::Index:
5404switch (opgenHiddenPtrIdentity(kinds)[1]) {
5405case Arg::Tmp:
5406#if CPU(X86_64) || CPU(ARM64)
5407OPGEN_RETURN(true);
5408#endif
5409break;
5410break;
5411default:
5412break;
5413}
5414break;
5415default:
5416break;
5417}
5418break;
5419default:
5420break;
5421}
5422break;
5423case Opcode::Move32ToFloat:
5424switch (sizeof...(Arguments)) {
5425case 2:
5426switch (opgenHiddenPtrIdentity(kinds)[0]) {
5427case Arg::Tmp:
5428switch (opgenHiddenPtrIdentity(kinds)[1]) {
5429case Arg::Tmp:
5430OPGEN_RETURN(true);
5431break;
5432break;
5433default:
5434break;
5435}
5436break;
5437case Arg::Addr:
5438case Arg::Stack:
5439case Arg::CallArg:
5440switch (opgenHiddenPtrIdentity(kinds)[1]) {
5441case Arg::Tmp:
5442#if CPU(X86) || CPU(X86_64)
5443OPGEN_RETURN(true);
5444#endif
5445break;
5446break;
5447default:
5448break;
5449}
5450break;
5451case Arg::Index:
5452switch (opgenHiddenPtrIdentity(kinds)[1]) {
5453case Arg::Tmp:
5454OPGEN_RETURN(true);
5455break;
5456break;
5457default:
5458break;
5459}
5460break;
5461default:
5462break;
5463}
5464break;
5465default:
5466break;
5467}
5468break;
5469case Opcode::MoveDoubleTo64:
5470switch (sizeof...(Arguments)) {
5471case 2:
5472switch (opgenHiddenPtrIdentity(kinds)[0]) {
5473case Arg::Tmp:
5474switch (opgenHiddenPtrIdentity(kinds)[1]) {
5475case Arg::Tmp:
5476#if CPU(X86_64) || CPU(ARM64)
5477OPGEN_RETURN(true);
5478#endif
5479break;
5480break;
5481default:
5482break;
5483}
5484break;
5485case Arg::Addr:
5486case Arg::Stack:
5487case Arg::CallArg:
5488switch (opgenHiddenPtrIdentity(kinds)[1]) {
5489case Arg::Tmp:
5490#if CPU(X86_64) || CPU(ARM64)
5491OPGEN_RETURN(true);
5492#endif
5493break;
5494break;
5495default:
5496break;
5497}
5498break;
5499case Arg::Index:
5500switch (opgenHiddenPtrIdentity(kinds)[1]) {
5501case Arg::Tmp:
5502#if CPU(X86_64) || CPU(ARM64)
5503OPGEN_RETURN(true);
5504#endif
5505break;
5506break;
5507default:
5508break;
5509}
5510break;
5511default:
5512break;
5513}
5514break;
5515default:
5516break;
5517}
5518break;
5519case Opcode::MoveFloatTo32:
5520switch (sizeof...(Arguments)) {
5521case 2:
5522switch (opgenHiddenPtrIdentity(kinds)[0]) {
5523case Arg::Tmp:
5524switch (opgenHiddenPtrIdentity(kinds)[1]) {
5525case Arg::Tmp:
5526OPGEN_RETURN(true);
5527break;
5528break;
5529default:
5530break;
5531}
5532break;
5533case Arg::Addr:
5534case Arg::Stack:
5535case Arg::CallArg:
5536switch (opgenHiddenPtrIdentity(kinds)[1]) {
5537case Arg::Tmp:
5538OPGEN_RETURN(true);
5539break;
5540break;
5541default:
5542break;
5543}
5544break;
5545case Arg::Index:
5546switch (opgenHiddenPtrIdentity(kinds)[1]) {
5547case Arg::Tmp:
5548OPGEN_RETURN(true);
5549break;
5550break;
5551default:
5552break;
5553}
5554break;
5555default:
5556break;
5557}
5558break;
5559default:
5560break;
5561}
5562break;
5563case Opcode::Load8:
5564switch (sizeof...(Arguments)) {
5565case 2:
5566switch (opgenHiddenPtrIdentity(kinds)[0]) {
5567case Arg::Addr:
5568case Arg::Stack:
5569case Arg::CallArg:
5570switch (opgenHiddenPtrIdentity(kinds)[1]) {
5571case Arg::Tmp:
5572OPGEN_RETURN(true);
5573break;
5574break;
5575default:
5576break;
5577}
5578break;
5579case Arg::Index:
5580switch (opgenHiddenPtrIdentity(kinds)[1]) {
5581case Arg::Tmp:
5582OPGEN_RETURN(true);
5583break;
5584break;
5585default:
5586break;
5587}
5588break;
5589default:
5590break;
5591}
5592break;
5593default:
5594break;
5595}
5596break;
5597case Opcode::LoadAcq8:
5598switch (sizeof...(Arguments)) {
5599case 2:
5600switch (opgenHiddenPtrIdentity(kinds)[0]) {
5601case Arg::SimpleAddr:
5602switch (opgenHiddenPtrIdentity(kinds)[1]) {
5603case Arg::Tmp:
5604#if CPU(ARMv7) || CPU(ARM64)
5605OPGEN_RETURN(true);
5606#endif
5607break;
5608break;
5609default:
5610break;
5611}
5612break;
5613default:
5614break;
5615}
5616break;
5617default:
5618break;
5619}
5620break;
5621case Opcode::Store8:
5622switch (sizeof...(Arguments)) {
5623case 2:
5624switch (opgenHiddenPtrIdentity(kinds)[0]) {
5625case Arg::Tmp:
5626switch (opgenHiddenPtrIdentity(kinds)[1]) {
5627case Arg::Index:
5628OPGEN_RETURN(true);
5629break;
5630break;
5631case Arg::Addr:
5632case Arg::Stack:
5633case Arg::CallArg:
5634OPGEN_RETURN(true);
5635break;
5636break;
5637default:
5638break;
5639}
5640break;
5641case Arg::Imm:
5642switch (opgenHiddenPtrIdentity(kinds)[1]) {
5643case Arg::Index:
5644#if CPU(X86) || CPU(X86_64)
5645OPGEN_RETURN(true);
5646#endif
5647break;
5648break;
5649case Arg::Addr:
5650case Arg::Stack:
5651case Arg::CallArg:
5652#if CPU(X86) || CPU(X86_64)
5653OPGEN_RETURN(true);
5654#endif
5655break;
5656break;
5657default:
5658break;
5659}
5660break;
5661default:
5662break;
5663}
5664break;
5665default:
5666break;
5667}
5668break;
5669case Opcode::StoreRel8:
5670switch (sizeof...(Arguments)) {
5671case 2:
5672switch (opgenHiddenPtrIdentity(kinds)[0]) {
5673case Arg::Tmp:
5674switch (opgenHiddenPtrIdentity(kinds)[1]) {
5675case Arg::SimpleAddr:
5676#if CPU(ARMv7) || CPU(ARM64)
5677OPGEN_RETURN(true);
5678#endif
5679break;
5680break;
5681default:
5682break;
5683}
5684break;
5685default:
5686break;
5687}
5688break;
5689default:
5690break;
5691}
5692break;
5693case Opcode::Load8SignedExtendTo32:
5694switch (sizeof...(Arguments)) {
5695case 2:
5696switch (opgenHiddenPtrIdentity(kinds)[0]) {
5697case Arg::Addr:
5698case Arg::Stack:
5699case Arg::CallArg:
5700switch (opgenHiddenPtrIdentity(kinds)[1]) {
5701case Arg::Tmp:
5702OPGEN_RETURN(true);
5703break;
5704break;
5705default:
5706break;
5707}
5708break;
5709case Arg::Index:
5710switch (opgenHiddenPtrIdentity(kinds)[1]) {
5711case Arg::Tmp:
5712OPGEN_RETURN(true);
5713break;
5714break;
5715default:
5716break;
5717}
5718break;
5719default:
5720break;
5721}
5722break;
5723default:
5724break;
5725}
5726break;
5727case Opcode::LoadAcq8SignedExtendTo32:
5728switch (sizeof...(Arguments)) {
5729case 2:
5730switch (opgenHiddenPtrIdentity(kinds)[0]) {
5731case Arg::SimpleAddr:
5732switch (opgenHiddenPtrIdentity(kinds)[1]) {
5733case Arg::Tmp:
5734#if CPU(ARMv7) || CPU(ARM64)
5735OPGEN_RETURN(true);
5736#endif
5737break;
5738break;
5739default:
5740break;
5741}
5742break;
5743default:
5744break;
5745}
5746break;
5747default:
5748break;
5749}
5750break;
5751case Opcode::Load16:
5752switch (sizeof...(Arguments)) {
5753case 2:
5754switch (opgenHiddenPtrIdentity(kinds)[0]) {
5755case Arg::Addr:
5756case Arg::Stack:
5757case Arg::CallArg:
5758switch (opgenHiddenPtrIdentity(kinds)[1]) {
5759case Arg::Tmp:
5760OPGEN_RETURN(true);
5761break;
5762break;
5763default:
5764break;
5765}
5766break;
5767case Arg::Index:
5768switch (opgenHiddenPtrIdentity(kinds)[1]) {
5769case Arg::Tmp:
5770OPGEN_RETURN(true);
5771break;
5772break;
5773default:
5774break;
5775}
5776break;
5777default:
5778break;
5779}
5780break;
5781default:
5782break;
5783}
5784break;
5785case Opcode::LoadAcq16:
5786switch (sizeof...(Arguments)) {
5787case 2:
5788switch (opgenHiddenPtrIdentity(kinds)[0]) {
5789case Arg::SimpleAddr:
5790switch (opgenHiddenPtrIdentity(kinds)[1]) {
5791case Arg::Tmp:
5792#if CPU(ARMv7) || CPU(ARM64)
5793OPGEN_RETURN(true);
5794#endif
5795break;
5796break;
5797default:
5798break;
5799}
5800break;
5801default:
5802break;
5803}
5804break;
5805default:
5806break;
5807}
5808break;
5809case Opcode::Load16SignedExtendTo32:
5810switch (sizeof...(Arguments)) {
5811case 2:
5812switch (opgenHiddenPtrIdentity(kinds)[0]) {
5813case Arg::Addr:
5814case Arg::Stack:
5815case Arg::CallArg:
5816switch (opgenHiddenPtrIdentity(kinds)[1]) {
5817case Arg::Tmp:
5818OPGEN_RETURN(true);
5819break;
5820break;
5821default:
5822break;
5823}
5824break;
5825case Arg::Index:
5826switch (opgenHiddenPtrIdentity(kinds)[1]) {
5827case Arg::Tmp:
5828OPGEN_RETURN(true);
5829break;
5830break;
5831default:
5832break;
5833}
5834break;
5835default:
5836break;
5837}
5838break;
5839default:
5840break;
5841}
5842break;
5843case Opcode::LoadAcq16SignedExtendTo32:
5844switch (sizeof...(Arguments)) {
5845case 2:
5846switch (opgenHiddenPtrIdentity(kinds)[0]) {
5847case Arg::SimpleAddr:
5848switch (opgenHiddenPtrIdentity(kinds)[1]) {
5849case Arg::Tmp:
5850#if CPU(ARMv7) || CPU(ARM64)
5851OPGEN_RETURN(true);
5852#endif
5853break;
5854break;
5855default:
5856break;
5857}
5858break;
5859default:
5860break;
5861}
5862break;
5863default:
5864break;
5865}
5866break;
5867case Opcode::Store16:
5868switch (sizeof...(Arguments)) {
5869case 2:
5870switch (opgenHiddenPtrIdentity(kinds)[0]) {
5871case Arg::Tmp:
5872switch (opgenHiddenPtrIdentity(kinds)[1]) {
5873case Arg::Index:
5874OPGEN_RETURN(true);
5875break;
5876break;
5877case Arg::Addr:
5878case Arg::Stack:
5879case Arg::CallArg:
5880OPGEN_RETURN(true);
5881break;
5882break;
5883default:
5884break;
5885}
5886break;
5887case Arg::Imm:
5888switch (opgenHiddenPtrIdentity(kinds)[1]) {
5889case Arg::Index:
5890#if CPU(X86) || CPU(X86_64)
5891OPGEN_RETURN(true);
5892#endif
5893break;
5894break;
5895case Arg::Addr:
5896case Arg::Stack:
5897case Arg::CallArg:
5898#if CPU(X86) || CPU(X86_64)
5899OPGEN_RETURN(true);
5900#endif
5901break;
5902break;
5903default:
5904break;
5905}
5906break;
5907default:
5908break;
5909}
5910break;
5911default:
5912break;
5913}
5914break;
5915case Opcode::StoreRel16:
5916switch (sizeof...(Arguments)) {
5917case 2:
5918switch (opgenHiddenPtrIdentity(kinds)[0]) {
5919case Arg::Tmp:
5920switch (opgenHiddenPtrIdentity(kinds)[1]) {
5921case Arg::SimpleAddr:
5922#if CPU(ARMv7) || CPU(ARM64)
5923OPGEN_RETURN(true);
5924#endif
5925break;
5926break;
5927default:
5928break;
5929}
5930break;
5931default:
5932break;
5933}
5934break;
5935default:
5936break;
5937}
5938break;
5939case Opcode::LoadAcq32:
5940switch (sizeof...(Arguments)) {
5941case 2:
5942switch (opgenHiddenPtrIdentity(kinds)[0]) {
5943case Arg::SimpleAddr:
5944switch (opgenHiddenPtrIdentity(kinds)[1]) {
5945case Arg::Tmp:
5946#if CPU(ARMv7) || CPU(ARM64)
5947OPGEN_RETURN(true);
5948#endif
5949break;
5950break;
5951default:
5952break;
5953}
5954break;
5955default:
5956break;
5957}
5958break;
5959default:
5960break;
5961}
5962break;
5963case Opcode::StoreRel32:
5964switch (sizeof...(Arguments)) {
5965case 2:
5966switch (opgenHiddenPtrIdentity(kinds)[0]) {
5967case Arg::Tmp:
5968switch (opgenHiddenPtrIdentity(kinds)[1]) {
5969case Arg::SimpleAddr:
5970#if CPU(ARMv7) || CPU(ARM64)
5971OPGEN_RETURN(true);
5972#endif
5973break;
5974break;
5975default:
5976break;
5977}
5978break;
5979default:
5980break;
5981}
5982break;
5983default:
5984break;
5985}
5986break;
5987case Opcode::LoadAcq64:
5988switch (sizeof...(Arguments)) {
5989case 2:
5990switch (opgenHiddenPtrIdentity(kinds)[0]) {
5991case Arg::SimpleAddr:
5992switch (opgenHiddenPtrIdentity(kinds)[1]) {
5993case Arg::Tmp:
5994#if CPU(ARM64)
5995OPGEN_RETURN(true);
5996#endif
5997break;
5998break;
5999default:
6000break;
6001}
6002break;
6003default:
6004break;
6005}
6006break;
6007default:
6008break;
6009}
6010break;
6011case Opcode::StoreRel64:
6012switch (sizeof...(Arguments)) {
6013case 2:
6014switch (opgenHiddenPtrIdentity(kinds)[0]) {
6015case Arg::Tmp:
6016switch (opgenHiddenPtrIdentity(kinds)[1]) {
6017case Arg::SimpleAddr:
6018#if CPU(ARM64)
6019OPGEN_RETURN(true);
6020#endif
6021break;
6022break;
6023default:
6024break;
6025}
6026break;
6027default:
6028break;
6029}
6030break;
6031default:
6032break;
6033}
6034break;
6035case Opcode::Xchg8:
6036switch (sizeof...(Arguments)) {
6037case 2:
6038switch (opgenHiddenPtrIdentity(kinds)[0]) {
6039case Arg::Tmp:
6040switch (opgenHiddenPtrIdentity(kinds)[1]) {
6041case Arg::Addr:
6042case Arg::Stack:
6043case Arg::CallArg:
6044#if CPU(X86) || CPU(X86_64)
6045OPGEN_RETURN(true);
6046#endif
6047break;
6048break;
6049case Arg::Index:
6050#if CPU(X86) || CPU(X86_64)
6051OPGEN_RETURN(true);
6052#endif
6053break;
6054break;
6055default:
6056break;
6057}
6058break;
6059default:
6060break;
6061}
6062break;
6063default:
6064break;
6065}
6066break;
6067case Opcode::Xchg16:
6068switch (sizeof...(Arguments)) {
6069case 2:
6070switch (opgenHiddenPtrIdentity(kinds)[0]) {
6071case Arg::Tmp:
6072switch (opgenHiddenPtrIdentity(kinds)[1]) {
6073case Arg::Addr:
6074case Arg::Stack:
6075case Arg::CallArg:
6076#if CPU(X86) || CPU(X86_64)
6077OPGEN_RETURN(true);
6078#endif
6079break;
6080break;
6081case Arg::Index:
6082#if CPU(X86) || CPU(X86_64)
6083OPGEN_RETURN(true);
6084#endif
6085break;
6086break;
6087default:
6088break;
6089}
6090break;
6091default:
6092break;
6093}
6094break;
6095default:
6096break;
6097}
6098break;
6099case Opcode::Xchg32:
6100switch (sizeof...(Arguments)) {
6101case 2:
6102switch (opgenHiddenPtrIdentity(kinds)[0]) {
6103case Arg::Tmp:
6104switch (opgenHiddenPtrIdentity(kinds)[1]) {
6105case Arg::Addr:
6106case Arg::Stack:
6107case Arg::CallArg:
6108#if CPU(X86) || CPU(X86_64)
6109OPGEN_RETURN(true);
6110#endif
6111break;
6112break;
6113case Arg::Index:
6114#if CPU(X86) || CPU(X86_64)
6115OPGEN_RETURN(true);
6116#endif
6117break;
6118break;
6119default:
6120break;
6121}
6122break;
6123default:
6124break;
6125}
6126break;
6127default:
6128break;
6129}
6130break;
6131case Opcode::Xchg64:
6132switch (sizeof...(Arguments)) {
6133case 2:
6134switch (opgenHiddenPtrIdentity(kinds)[0]) {
6135case Arg::Tmp:
6136switch (opgenHiddenPtrIdentity(kinds)[1]) {
6137case Arg::Addr:
6138case Arg::Stack:
6139case Arg::CallArg:
6140#if CPU(X86_64)
6141OPGEN_RETURN(true);
6142#endif
6143break;
6144break;
6145case Arg::Index:
6146#if CPU(X86_64)
6147OPGEN_RETURN(true);
6148#endif
6149break;
6150break;
6151default:
6152break;
6153}
6154break;
6155default:
6156break;
6157}
6158break;
6159default:
6160break;
6161}
6162break;
6163case Opcode::AtomicStrongCAS8:
6164switch (sizeof...(Arguments)) {
6165case 5:
6166switch (opgenHiddenPtrIdentity(kinds)[0]) {
6167case Arg::StatusCond:
6168switch (opgenHiddenPtrIdentity(kinds)[1]) {
6169case Arg::Tmp:
6170switch (opgenHiddenPtrIdentity(kinds)[2]) {
6171case Arg::Tmp:
6172switch (opgenHiddenPtrIdentity(kinds)[3]) {
6173case Arg::Addr:
6174case Arg::Stack:
6175case Arg::CallArg:
6176switch (opgenHiddenPtrIdentity(kinds)[4]) {
6177case Arg::Tmp:
6178break;
6179break;
6180default:
6181break;
6182}
6183break;
6184case Arg::Index:
6185switch (opgenHiddenPtrIdentity(kinds)[4]) {
6186case Arg::Tmp:
6187break;
6188break;
6189default:
6190break;
6191}
6192break;
6193default:
6194break;
6195}
6196break;
6197default:
6198break;
6199}
6200break;
6201default:
6202break;
6203}
6204break;
6205default:
6206break;
6207}
6208break;
6209case 3:
6210switch (opgenHiddenPtrIdentity(kinds)[0]) {
6211case Arg::Tmp:
6212switch (opgenHiddenPtrIdentity(kinds)[1]) {
6213case Arg::Tmp:
6214switch (opgenHiddenPtrIdentity(kinds)[2]) {
6215case Arg::Addr:
6216case Arg::Stack:
6217case Arg::CallArg:
6218break;
6219break;
6220case Arg::Index:
6221break;
6222break;
6223default:
6224break;
6225}
6226break;
6227default:
6228break;
6229}
6230break;
6231default:
6232break;
6233}
6234break;
6235default:
6236break;
6237}
6238break;
6239case Opcode::AtomicStrongCAS16:
6240switch (sizeof...(Arguments)) {
6241case 5:
6242switch (opgenHiddenPtrIdentity(kinds)[0]) {
6243case Arg::StatusCond:
6244switch (opgenHiddenPtrIdentity(kinds)[1]) {
6245case Arg::Tmp:
6246switch (opgenHiddenPtrIdentity(kinds)[2]) {
6247case Arg::Tmp:
6248switch (opgenHiddenPtrIdentity(kinds)[3]) {
6249case Arg::Addr:
6250case Arg::Stack:
6251case Arg::CallArg:
6252switch (opgenHiddenPtrIdentity(kinds)[4]) {
6253case Arg::Tmp:
6254break;
6255break;
6256default:
6257break;
6258}
6259break;
6260case Arg::Index:
6261switch (opgenHiddenPtrIdentity(kinds)[4]) {
6262case Arg::Tmp:
6263break;
6264break;
6265default:
6266break;
6267}
6268break;
6269default:
6270break;
6271}
6272break;
6273default:
6274break;
6275}
6276break;
6277default:
6278break;
6279}
6280break;
6281default:
6282break;
6283}
6284break;
6285case 3:
6286switch (opgenHiddenPtrIdentity(kinds)[0]) {
6287case Arg::Tmp:
6288switch (opgenHiddenPtrIdentity(kinds)[1]) {
6289case Arg::Tmp:
6290switch (opgenHiddenPtrIdentity(kinds)[2]) {
6291case Arg::Addr:
6292case Arg::Stack:
6293case Arg::CallArg:
6294break;
6295break;
6296case Arg::Index:
6297break;
6298break;
6299default:
6300break;
6301}
6302break;
6303default:
6304break;
6305}
6306break;
6307default:
6308break;
6309}
6310break;
6311default:
6312break;
6313}
6314break;
6315case Opcode::AtomicStrongCAS32:
6316switch (sizeof...(Arguments)) {
6317case 5:
6318switch (opgenHiddenPtrIdentity(kinds)[0]) {
6319case Arg::StatusCond:
6320switch (opgenHiddenPtrIdentity(kinds)[1]) {
6321case Arg::Tmp:
6322switch (opgenHiddenPtrIdentity(kinds)[2]) {
6323case Arg::Tmp:
6324switch (opgenHiddenPtrIdentity(kinds)[3]) {
6325case Arg::Addr:
6326case Arg::Stack:
6327case Arg::CallArg:
6328switch (opgenHiddenPtrIdentity(kinds)[4]) {
6329case Arg::Tmp:
6330break;
6331break;
6332default:
6333break;
6334}
6335break;
6336case Arg::Index:
6337switch (opgenHiddenPtrIdentity(kinds)[4]) {
6338case Arg::Tmp:
6339break;
6340break;
6341default:
6342break;
6343}
6344break;
6345default:
6346break;
6347}
6348break;
6349default:
6350break;
6351}
6352break;
6353default:
6354break;
6355}
6356break;
6357default:
6358break;
6359}
6360break;
6361case 3:
6362switch (opgenHiddenPtrIdentity(kinds)[0]) {
6363case Arg::Tmp:
6364switch (opgenHiddenPtrIdentity(kinds)[1]) {
6365case Arg::Tmp:
6366switch (opgenHiddenPtrIdentity(kinds)[2]) {
6367case Arg::Addr:
6368case Arg::Stack:
6369case Arg::CallArg:
6370break;
6371break;
6372case Arg::Index:
6373break;
6374break;
6375default:
6376break;
6377}
6378break;
6379default:
6380break;
6381}
6382break;
6383default:
6384break;
6385}
6386break;
6387default:
6388break;
6389}
6390break;
6391case Opcode::AtomicStrongCAS64:
6392switch (sizeof...(Arguments)) {
6393case 5:
6394switch (opgenHiddenPtrIdentity(kinds)[0]) {
6395case Arg::StatusCond:
6396switch (opgenHiddenPtrIdentity(kinds)[1]) {
6397case Arg::Tmp:
6398switch (opgenHiddenPtrIdentity(kinds)[2]) {
6399case Arg::Tmp:
6400switch (opgenHiddenPtrIdentity(kinds)[3]) {
6401case Arg::Addr:
6402case Arg::Stack:
6403case Arg::CallArg:
6404switch (opgenHiddenPtrIdentity(kinds)[4]) {
6405case Arg::Tmp:
6406break;
6407break;
6408default:
6409break;
6410}
6411break;
6412case Arg::Index:
6413switch (opgenHiddenPtrIdentity(kinds)[4]) {
6414case Arg::Tmp:
6415break;
6416break;
6417default:
6418break;
6419}
6420break;
6421default:
6422break;
6423}
6424break;
6425default:
6426break;
6427}
6428break;
6429default:
6430break;
6431}
6432break;
6433default:
6434break;
6435}
6436break;
6437case 3:
6438switch (opgenHiddenPtrIdentity(kinds)[0]) {
6439case Arg::Tmp:
6440switch (opgenHiddenPtrIdentity(kinds)[1]) {
6441case Arg::Tmp:
6442switch (opgenHiddenPtrIdentity(kinds)[2]) {
6443case Arg::Addr:
6444case Arg::Stack:
6445case Arg::CallArg:
6446break;
6447break;
6448case Arg::Index:
6449break;
6450break;
6451default:
6452break;
6453}
6454break;
6455default:
6456break;
6457}
6458break;
6459default:
6460break;
6461}
6462break;
6463default:
6464break;
6465}
6466break;
6467case Opcode::BranchAtomicStrongCAS8:
6468switch (sizeof...(Arguments)) {
6469case 4:
6470switch (opgenHiddenPtrIdentity(kinds)[0]) {
6471case Arg::StatusCond:
6472switch (opgenHiddenPtrIdentity(kinds)[1]) {
6473case Arg::Tmp:
6474switch (opgenHiddenPtrIdentity(kinds)[2]) {
6475case Arg::Tmp:
6476switch (opgenHiddenPtrIdentity(kinds)[3]) {
6477case Arg::Addr:
6478case Arg::Stack:
6479case Arg::CallArg:
6480break;
6481break;
6482case Arg::Index:
6483break;
6484break;
6485default:
6486break;
6487}
6488break;
6489default:
6490break;
6491}
6492break;
6493default:
6494break;
6495}
6496break;
6497default:
6498break;
6499}
6500break;
6501default:
6502break;
6503}
6504break;
6505case Opcode::BranchAtomicStrongCAS16:
6506switch (sizeof...(Arguments)) {
6507case 4:
6508switch (opgenHiddenPtrIdentity(kinds)[0]) {
6509case Arg::StatusCond:
6510switch (opgenHiddenPtrIdentity(kinds)[1]) {
6511case Arg::Tmp:
6512switch (opgenHiddenPtrIdentity(kinds)[2]) {
6513case Arg::Tmp:
6514switch (opgenHiddenPtrIdentity(kinds)[3]) {
6515case Arg::Addr:
6516case Arg::Stack:
6517case Arg::CallArg:
6518break;
6519break;
6520case Arg::Index:
6521break;
6522break;
6523default:
6524break;
6525}
6526break;
6527default:
6528break;
6529}
6530break;
6531default:
6532break;
6533}
6534break;
6535default:
6536break;
6537}
6538break;
6539default:
6540break;
6541}
6542break;
6543case Opcode::BranchAtomicStrongCAS32:
6544switch (sizeof...(Arguments)) {
6545case 4:
6546switch (opgenHiddenPtrIdentity(kinds)[0]) {
6547case Arg::StatusCond:
6548switch (opgenHiddenPtrIdentity(kinds)[1]) {
6549case Arg::Tmp:
6550switch (opgenHiddenPtrIdentity(kinds)[2]) {
6551case Arg::Tmp:
6552switch (opgenHiddenPtrIdentity(kinds)[3]) {
6553case Arg::Addr:
6554case Arg::Stack:
6555case Arg::CallArg:
6556break;
6557break;
6558case Arg::Index:
6559break;
6560break;
6561default:
6562break;
6563}
6564break;
6565default:
6566break;
6567}
6568break;
6569default:
6570break;
6571}
6572break;
6573default:
6574break;
6575}
6576break;
6577default:
6578break;
6579}
6580break;
6581case Opcode::BranchAtomicStrongCAS64:
6582switch (sizeof...(Arguments)) {
6583case 4:
6584switch (opgenHiddenPtrIdentity(kinds)[0]) {
6585case Arg::StatusCond:
6586switch (opgenHiddenPtrIdentity(kinds)[1]) {
6587case Arg::Tmp:
6588switch (opgenHiddenPtrIdentity(kinds)[2]) {
6589case Arg::Tmp:
6590switch (opgenHiddenPtrIdentity(kinds)[3]) {
6591case Arg::Addr:
6592case Arg::Stack:
6593case Arg::CallArg:
6594break;
6595break;
6596case Arg::Index:
6597break;
6598break;
6599default:
6600break;
6601}
6602break;
6603default:
6604break;
6605}
6606break;
6607default:
6608break;
6609}
6610break;
6611default:
6612break;
6613}
6614break;
6615default:
6616break;
6617}
6618break;
6619case Opcode::AtomicAdd8:
6620switch (sizeof...(Arguments)) {
6621case 2:
6622switch (opgenHiddenPtrIdentity(kinds)[0]) {
6623case Arg::Imm:
6624switch (opgenHiddenPtrIdentity(kinds)[1]) {
6625case Arg::Addr:
6626case Arg::Stack:
6627case Arg::CallArg:
6628#if CPU(X86) || CPU(X86_64)
6629OPGEN_RETURN(true);
6630#endif
6631break;
6632break;
6633case Arg::Index:
6634#if CPU(X86) || CPU(X86_64)
6635OPGEN_RETURN(true);
6636#endif
6637break;
6638break;
6639default:
6640break;
6641}
6642break;
6643case Arg::Tmp:
6644switch (opgenHiddenPtrIdentity(kinds)[1]) {
6645case Arg::Addr:
6646case Arg::Stack:
6647case Arg::CallArg:
6648#if CPU(X86) || CPU(X86_64)
6649OPGEN_RETURN(true);
6650#endif
6651break;
6652break;
6653case Arg::Index:
6654#if CPU(X86) || CPU(X86_64)
6655OPGEN_RETURN(true);
6656#endif
6657break;
6658break;
6659default:
6660break;
6661}
6662break;
6663default:
6664break;
6665}
6666break;
6667default:
6668break;
6669}
6670break;
6671case Opcode::AtomicAdd16:
6672switch (sizeof...(Arguments)) {
6673case 2:
6674switch (opgenHiddenPtrIdentity(kinds)[0]) {
6675case Arg::Imm:
6676switch (opgenHiddenPtrIdentity(kinds)[1]) {
6677case Arg::Addr:
6678case Arg::Stack:
6679case Arg::CallArg:
6680#if CPU(X86) || CPU(X86_64)
6681OPGEN_RETURN(true);
6682#endif
6683break;
6684break;
6685case Arg::Index:
6686#if CPU(X86) || CPU(X86_64)
6687OPGEN_RETURN(true);
6688#endif
6689break;
6690break;
6691default:
6692break;
6693}
6694break;
6695case Arg::Tmp:
6696switch (opgenHiddenPtrIdentity(kinds)[1]) {
6697case Arg::Addr:
6698case Arg::Stack:
6699case Arg::CallArg:
6700#if CPU(X86) || CPU(X86_64)
6701OPGEN_RETURN(true);
6702#endif
6703break;
6704break;
6705case Arg::Index:
6706#if CPU(X86) || CPU(X86_64)
6707OPGEN_RETURN(true);
6708#endif
6709break;
6710break;
6711default:
6712break;
6713}
6714break;
6715default:
6716break;
6717}
6718break;
6719default:
6720break;
6721}
6722break;
6723case Opcode::AtomicAdd32:
6724switch (sizeof...(Arguments)) {
6725case 2:
6726switch (opgenHiddenPtrIdentity(kinds)[0]) {
6727case Arg::Imm:
6728switch (opgenHiddenPtrIdentity(kinds)[1]) {
6729case Arg::Addr:
6730case Arg::Stack:
6731case Arg::CallArg:
6732#if CPU(X86) || CPU(X86_64)
6733OPGEN_RETURN(true);
6734#endif
6735break;
6736break;
6737case Arg::Index:
6738#if CPU(X86) || CPU(X86_64)
6739OPGEN_RETURN(true);
6740#endif
6741break;
6742break;
6743default:
6744break;
6745}
6746break;
6747case Arg::Tmp:
6748switch (opgenHiddenPtrIdentity(kinds)[1]) {
6749case Arg::Addr:
6750case Arg::Stack:
6751case Arg::CallArg:
6752#if CPU(X86) || CPU(X86_64)
6753OPGEN_RETURN(true);
6754#endif
6755break;
6756break;
6757case Arg::Index:
6758#if CPU(X86) || CPU(X86_64)
6759OPGEN_RETURN(true);
6760#endif
6761break;
6762break;
6763default:
6764break;
6765}
6766break;
6767default:
6768break;
6769}
6770break;
6771default:
6772break;
6773}
6774break;
6775case Opcode::AtomicAdd64:
6776switch (sizeof...(Arguments)) {
6777case 2:
6778switch (opgenHiddenPtrIdentity(kinds)[0]) {
6779case Arg::Imm:
6780switch (opgenHiddenPtrIdentity(kinds)[1]) {
6781case Arg::Addr:
6782case Arg::Stack:
6783case Arg::CallArg:
6784#if CPU(X86_64)
6785OPGEN_RETURN(true);
6786#endif
6787break;
6788break;
6789case Arg::Index:
6790#if CPU(X86_64)
6791OPGEN_RETURN(true);
6792#endif
6793break;
6794break;
6795default:
6796break;
6797}
6798break;
6799case Arg::Tmp:
6800switch (opgenHiddenPtrIdentity(kinds)[1]) {
6801case Arg::Addr:
6802case Arg::Stack:
6803case Arg::CallArg:
6804#if CPU(X86_64)
6805OPGEN_RETURN(true);
6806#endif
6807break;
6808break;
6809case Arg::Index:
6810#if CPU(X86_64)
6811OPGEN_RETURN(true);
6812#endif
6813break;
6814break;
6815default:
6816break;
6817}
6818break;
6819default:
6820break;
6821}
6822break;
6823default:
6824break;
6825}
6826break;
6827case Opcode::AtomicSub8:
6828switch (sizeof...(Arguments)) {
6829case 2:
6830switch (opgenHiddenPtrIdentity(kinds)[0]) {
6831case Arg::Imm:
6832switch (opgenHiddenPtrIdentity(kinds)[1]) {
6833case Arg::Addr:
6834case Arg::Stack:
6835case Arg::CallArg:
6836#if CPU(X86) || CPU(X86_64)
6837OPGEN_RETURN(true);
6838#endif
6839break;
6840break;
6841case Arg::Index:
6842#if CPU(X86) || CPU(X86_64)
6843OPGEN_RETURN(true);
6844#endif
6845break;
6846break;
6847default:
6848break;
6849}
6850break;
6851case Arg::Tmp:
6852switch (opgenHiddenPtrIdentity(kinds)[1]) {
6853case Arg::Addr:
6854case Arg::Stack:
6855case Arg::CallArg:
6856#if CPU(X86) || CPU(X86_64)
6857OPGEN_RETURN(true);
6858#endif
6859break;
6860break;
6861case Arg::Index:
6862#if CPU(X86) || CPU(X86_64)
6863OPGEN_RETURN(true);
6864#endif
6865break;
6866break;
6867default:
6868break;
6869}
6870break;
6871default:
6872break;
6873}
6874break;
6875default:
6876break;
6877}
6878break;
6879case Opcode::AtomicSub16:
6880switch (sizeof...(Arguments)) {
6881case 2:
6882switch (opgenHiddenPtrIdentity(kinds)[0]) {
6883case Arg::Imm:
6884switch (opgenHiddenPtrIdentity(kinds)[1]) {
6885case Arg::Addr:
6886case Arg::Stack:
6887case Arg::CallArg:
6888#if CPU(X86) || CPU(X86_64)
6889OPGEN_RETURN(true);
6890#endif
6891break;
6892break;
6893case Arg::Index:
6894#if CPU(X86) || CPU(X86_64)
6895OPGEN_RETURN(true);
6896#endif
6897break;
6898break;
6899default:
6900break;
6901}
6902break;
6903case Arg::Tmp:
6904switch (opgenHiddenPtrIdentity(kinds)[1]) {
6905case Arg::Addr:
6906case Arg::Stack:
6907case Arg::CallArg:
6908#if CPU(X86) || CPU(X86_64)
6909OPGEN_RETURN(true);
6910#endif
6911break;
6912break;
6913case Arg::Index:
6914#if CPU(X86) || CPU(X86_64)
6915OPGEN_RETURN(true);
6916#endif
6917break;
6918break;
6919default:
6920break;
6921}
6922break;
6923default:
6924break;
6925}
6926break;
6927default:
6928break;
6929}
6930break;
6931case Opcode::AtomicSub32:
6932switch (sizeof...(Arguments)) {
6933case 2:
6934switch (opgenHiddenPtrIdentity(kinds)[0]) {
6935case Arg::Imm:
6936switch (opgenHiddenPtrIdentity(kinds)[1]) {
6937case Arg::Addr:
6938case Arg::Stack:
6939case Arg::CallArg:
6940#if CPU(X86) || CPU(X86_64)
6941OPGEN_RETURN(true);
6942#endif
6943break;
6944break;
6945case Arg::Index:
6946#if CPU(X86) || CPU(X86_64)
6947OPGEN_RETURN(true);
6948#endif
6949break;
6950break;
6951default:
6952break;
6953}
6954break;
6955case Arg::Tmp:
6956switch (opgenHiddenPtrIdentity(kinds)[1]) {
6957case Arg::Addr:
6958case Arg::Stack:
6959case Arg::CallArg:
6960#if CPU(X86) || CPU(X86_64)
6961OPGEN_RETURN(true);
6962#endif
6963break;
6964break;
6965case Arg::Index:
6966#if CPU(X86) || CPU(X86_64)
6967OPGEN_RETURN(true);
6968#endif
6969break;
6970break;
6971default:
6972break;
6973}
6974break;
6975default:
6976break;
6977}
6978break;
6979default:
6980break;
6981}
6982break;
6983case Opcode::AtomicSub64:
6984switch (sizeof...(Arguments)) {
6985case 2:
6986switch (opgenHiddenPtrIdentity(kinds)[0]) {
6987case Arg::Imm:
6988switch (opgenHiddenPtrIdentity(kinds)[1]) {
6989case Arg::Addr:
6990case Arg::Stack:
6991case Arg::CallArg:
6992#if CPU(X86_64)
6993OPGEN_RETURN(true);
6994#endif
6995break;
6996break;
6997case Arg::Index:
6998#if CPU(X86_64)
6999OPGEN_RETURN(true);
7000#endif
7001break;
7002break;
7003default:
7004break;
7005}
7006break;
7007case Arg::Tmp:
7008switch (opgenHiddenPtrIdentity(kinds)[1]) {
7009case Arg::Addr:
7010case Arg::Stack:
7011case Arg::CallArg:
7012#if CPU(X86_64)
7013OPGEN_RETURN(true);
7014#endif
7015break;
7016break;
7017case Arg::Index:
7018#if CPU(X86_64)
7019OPGEN_RETURN(true);
7020#endif
7021break;
7022break;
7023default:
7024break;
7025}
7026break;
7027default:
7028break;
7029}
7030break;
7031default:
7032break;
7033}
7034break;
7035case Opcode::AtomicAnd8:
7036switch (sizeof...(Arguments)) {
7037case 2:
7038switch (opgenHiddenPtrIdentity(kinds)[0]) {
7039case Arg::Imm:
7040switch (opgenHiddenPtrIdentity(kinds)[1]) {
7041case Arg::Addr:
7042case Arg::Stack:
7043case Arg::CallArg:
7044#if CPU(X86) || CPU(X86_64)
7045OPGEN_RETURN(true);
7046#endif
7047break;
7048break;
7049case Arg::Index:
7050#if CPU(X86) || CPU(X86_64)
7051OPGEN_RETURN(true);
7052#endif
7053break;
7054break;
7055default:
7056break;
7057}
7058break;
7059case Arg::Tmp:
7060switch (opgenHiddenPtrIdentity(kinds)[1]) {
7061case Arg::Addr:
7062case Arg::Stack:
7063case Arg::CallArg:
7064#if CPU(X86) || CPU(X86_64)
7065OPGEN_RETURN(true);
7066#endif
7067break;
7068break;
7069case Arg::Index:
7070#if CPU(X86) || CPU(X86_64)
7071OPGEN_RETURN(true);
7072#endif
7073break;
7074break;
7075default:
7076break;
7077}
7078break;
7079default:
7080break;
7081}
7082break;
7083default:
7084break;
7085}
7086break;
7087case Opcode::AtomicAnd16:
7088switch (sizeof...(Arguments)) {
7089case 2:
7090switch (opgenHiddenPtrIdentity(kinds)[0]) {
7091case Arg::Imm:
7092switch (opgenHiddenPtrIdentity(kinds)[1]) {
7093case Arg::Addr:
7094case Arg::Stack:
7095case Arg::CallArg:
7096#if CPU(X86) || CPU(X86_64)
7097OPGEN_RETURN(true);
7098#endif
7099break;
7100break;
7101case Arg::Index:
7102#if CPU(X86) || CPU(X86_64)
7103OPGEN_RETURN(true);
7104#endif
7105break;
7106break;
7107default:
7108break;
7109}
7110break;
7111case Arg::Tmp:
7112switch (opgenHiddenPtrIdentity(kinds)[1]) {
7113case Arg::Addr:
7114case Arg::Stack:
7115case Arg::CallArg:
7116#if CPU(X86) || CPU(X86_64)
7117OPGEN_RETURN(true);
7118#endif
7119break;
7120break;
7121case Arg::Index:
7122#if CPU(X86) || CPU(X86_64)
7123OPGEN_RETURN(true);
7124#endif
7125break;
7126break;
7127default:
7128break;
7129}
7130break;
7131default:
7132break;
7133}
7134break;
7135default:
7136break;
7137}
7138break;
7139case Opcode::AtomicAnd32:
7140switch (sizeof...(Arguments)) {
7141case 2:
7142switch (opgenHiddenPtrIdentity(kinds)[0]) {
7143case Arg::Imm:
7144switch (opgenHiddenPtrIdentity(kinds)[1]) {
7145case Arg::Addr:
7146case Arg::Stack:
7147case Arg::CallArg:
7148#if CPU(X86) || CPU(X86_64)
7149OPGEN_RETURN(true);
7150#endif
7151break;
7152break;
7153case Arg::Index:
7154#if CPU(X86) || CPU(X86_64)
7155OPGEN_RETURN(true);
7156#endif
7157break;
7158break;
7159default:
7160break;
7161}
7162break;
7163case Arg::Tmp:
7164switch (opgenHiddenPtrIdentity(kinds)[1]) {
7165case Arg::Addr:
7166case Arg::Stack:
7167case Arg::CallArg:
7168#if CPU(X86) || CPU(X86_64)
7169OPGEN_RETURN(true);
7170#endif
7171break;
7172break;
7173case Arg::Index:
7174#if CPU(X86) || CPU(X86_64)
7175OPGEN_RETURN(true);
7176#endif
7177break;
7178break;
7179default:
7180break;
7181}
7182break;
7183default:
7184break;
7185}
7186break;
7187default:
7188break;
7189}
7190break;
7191case Opcode::AtomicAnd64:
7192switch (sizeof...(Arguments)) {
7193case 2:
7194switch (opgenHiddenPtrIdentity(kinds)[0]) {
7195case Arg::Imm:
7196switch (opgenHiddenPtrIdentity(kinds)[1]) {
7197case Arg::Addr:
7198case Arg::Stack:
7199case Arg::CallArg:
7200#if CPU(X86_64)
7201OPGEN_RETURN(true);
7202#endif
7203break;
7204break;
7205case Arg::Index:
7206#if CPU(X86_64)
7207OPGEN_RETURN(true);
7208#endif
7209break;
7210break;
7211default:
7212break;
7213}
7214break;
7215case Arg::Tmp:
7216switch (opgenHiddenPtrIdentity(kinds)[1]) {
7217case Arg::Addr:
7218case Arg::Stack:
7219case Arg::CallArg:
7220#if CPU(X86_64)
7221OPGEN_RETURN(true);
7222#endif
7223break;
7224break;
7225case Arg::Index:
7226#if CPU(X86_64)
7227OPGEN_RETURN(true);
7228#endif
7229break;
7230break;
7231default:
7232break;
7233}
7234break;
7235default:
7236break;
7237}
7238break;
7239default:
7240break;
7241}
7242break;
7243case Opcode::AtomicOr8:
7244switch (sizeof...(Arguments)) {
7245case 2:
7246switch (opgenHiddenPtrIdentity(kinds)[0]) {
7247case Arg::Imm:
7248switch (opgenHiddenPtrIdentity(kinds)[1]) {
7249case Arg::Addr:
7250case Arg::Stack:
7251case Arg::CallArg:
7252#if CPU(X86) || CPU(X86_64)
7253OPGEN_RETURN(true);
7254#endif
7255break;
7256break;
7257case Arg::Index:
7258#if CPU(X86) || CPU(X86_64)
7259OPGEN_RETURN(true);
7260#endif
7261break;
7262break;
7263default:
7264break;
7265}
7266break;
7267case Arg::Tmp:
7268switch (opgenHiddenPtrIdentity(kinds)[1]) {
7269case Arg::Addr:
7270case Arg::Stack:
7271case Arg::CallArg:
7272#if CPU(X86) || CPU(X86_64)
7273OPGEN_RETURN(true);
7274#endif
7275break;
7276break;
7277case Arg::Index:
7278#if CPU(X86) || CPU(X86_64)
7279OPGEN_RETURN(true);
7280#endif
7281break;
7282break;
7283default:
7284break;
7285}
7286break;
7287default:
7288break;
7289}
7290break;
7291default:
7292break;
7293}
7294break;
7295case Opcode::AtomicOr16:
7296switch (sizeof...(Arguments)) {
7297case 2:
7298switch (opgenHiddenPtrIdentity(kinds)[0]) {
7299case Arg::Imm:
7300switch (opgenHiddenPtrIdentity(kinds)[1]) {
7301case Arg::Addr:
7302case Arg::Stack:
7303case Arg::CallArg:
7304#if CPU(X86) || CPU(X86_64)
7305OPGEN_RETURN(true);
7306#endif
7307break;
7308break;
7309case Arg::Index:
7310#if CPU(X86) || CPU(X86_64)
7311OPGEN_RETURN(true);
7312#endif
7313break;
7314break;
7315default:
7316break;
7317}
7318break;
7319case Arg::Tmp:
7320switch (opgenHiddenPtrIdentity(kinds)[1]) {
7321case Arg::Addr:
7322case Arg::Stack:
7323case Arg::CallArg:
7324#if CPU(X86) || CPU(X86_64)
7325OPGEN_RETURN(true);
7326#endif
7327break;
7328break;
7329case Arg::Index:
7330#if CPU(X86) || CPU(X86_64)
7331OPGEN_RETURN(true);
7332#endif
7333break;
7334break;
7335default:
7336break;
7337}
7338break;
7339default:
7340break;
7341}
7342break;
7343default:
7344break;
7345}
7346break;
7347case Opcode::AtomicOr32:
7348switch (sizeof...(Arguments)) {
7349case 2:
7350switch (opgenHiddenPtrIdentity(kinds)[0]) {
7351case Arg::Imm:
7352switch (opgenHiddenPtrIdentity(kinds)[1]) {
7353case Arg::Addr:
7354case Arg::Stack:
7355case Arg::CallArg:
7356#if CPU(X86) || CPU(X86_64)
7357OPGEN_RETURN(true);
7358#endif
7359break;
7360break;
7361case Arg::Index:
7362#if CPU(X86) || CPU(X86_64)
7363OPGEN_RETURN(true);
7364#endif
7365break;
7366break;
7367default:
7368break;
7369}
7370break;
7371case Arg::Tmp:
7372switch (opgenHiddenPtrIdentity(kinds)[1]) {
7373case Arg::Addr:
7374case Arg::Stack:
7375case Arg::CallArg:
7376#if CPU(X86) || CPU(X86_64)
7377OPGEN_RETURN(true);
7378#endif
7379break;
7380break;
7381case Arg::Index:
7382#if CPU(X86) || CPU(X86_64)
7383OPGEN_RETURN(true);
7384#endif
7385break;
7386break;
7387default:
7388break;
7389}
7390break;
7391default:
7392break;
7393}
7394break;
7395default:
7396break;
7397}
7398break;
7399case Opcode::AtomicOr64:
7400switch (sizeof...(Arguments)) {
7401case 2:
7402switch (opgenHiddenPtrIdentity(kinds)[0]) {
7403case Arg::Imm:
7404switch (opgenHiddenPtrIdentity(kinds)[1]) {
7405case Arg::Addr:
7406case Arg::Stack:
7407case Arg::CallArg:
7408#if CPU(X86_64)
7409OPGEN_RETURN(true);
7410#endif
7411break;
7412break;
7413case Arg::Index:
7414#if CPU(X86_64)
7415OPGEN_RETURN(true);
7416#endif
7417break;
7418break;
7419default:
7420break;
7421}
7422break;
7423case Arg::Tmp:
7424switch (opgenHiddenPtrIdentity(kinds)[1]) {
7425case Arg::Addr:
7426case Arg::Stack:
7427case Arg::CallArg:
7428#if CPU(X86_64)
7429OPGEN_RETURN(true);
7430#endif
7431break;
7432break;
7433case Arg::Index:
7434#if CPU(X86_64)
7435OPGEN_RETURN(true);
7436#endif
7437break;
7438break;
7439default:
7440break;
7441}
7442break;
7443default:
7444break;
7445}
7446break;
7447default:
7448break;
7449}
7450break;
7451case Opcode::AtomicXor8:
7452switch (sizeof...(Arguments)) {
7453case 2:
7454switch (opgenHiddenPtrIdentity(kinds)[0]) {
7455case Arg::Imm:
7456switch (opgenHiddenPtrIdentity(kinds)[1]) {
7457case Arg::Addr:
7458case Arg::Stack:
7459case Arg::CallArg:
7460#if CPU(X86) || CPU(X86_64)
7461OPGEN_RETURN(true);
7462#endif
7463break;
7464break;
7465case Arg::Index:
7466#if CPU(X86) || CPU(X86_64)
7467OPGEN_RETURN(true);
7468#endif
7469break;
7470break;
7471default:
7472break;
7473}
7474break;
7475case Arg::Tmp:
7476switch (opgenHiddenPtrIdentity(kinds)[1]) {
7477case Arg::Addr:
7478case Arg::Stack:
7479case Arg::CallArg:
7480#if CPU(X86) || CPU(X86_64)
7481OPGEN_RETURN(true);
7482#endif
7483break;
7484break;
7485case Arg::Index:
7486#if CPU(X86) || CPU(X86_64)
7487OPGEN_RETURN(true);
7488#endif
7489break;
7490break;
7491default:
7492break;
7493}
7494break;
7495default:
7496break;
7497}
7498break;
7499default:
7500break;
7501}
7502break;
7503case Opcode::AtomicXor16:
7504switch (sizeof...(Arguments)) {
7505case 2:
7506switch (opgenHiddenPtrIdentity(kinds)[0]) {
7507case Arg::Imm:
7508switch (opgenHiddenPtrIdentity(kinds)[1]) {
7509case Arg::Addr:
7510case Arg::Stack:
7511case Arg::CallArg:
7512#if CPU(X86) || CPU(X86_64)
7513OPGEN_RETURN(true);
7514#endif
7515break;
7516break;
7517case Arg::Index:
7518#if CPU(X86) || CPU(X86_64)
7519OPGEN_RETURN(true);
7520#endif
7521break;
7522break;
7523default:
7524break;
7525}
7526break;
7527case Arg::Tmp:
7528switch (opgenHiddenPtrIdentity(kinds)[1]) {
7529case Arg::Addr:
7530case Arg::Stack:
7531case Arg::CallArg:
7532#if CPU(X86) || CPU(X86_64)
7533OPGEN_RETURN(true);
7534#endif
7535break;
7536break;
7537case Arg::Index:
7538#if CPU(X86) || CPU(X86_64)
7539OPGEN_RETURN(true);
7540#endif
7541break;
7542break;
7543default:
7544break;
7545}
7546break;
7547default:
7548break;
7549}
7550break;
7551default:
7552break;
7553}
7554break;
7555case Opcode::AtomicXor32:
7556switch (sizeof...(Arguments)) {
7557case 2:
7558switch (opgenHiddenPtrIdentity(kinds)[0]) {
7559case Arg::Imm:
7560switch (opgenHiddenPtrIdentity(kinds)[1]) {
7561case Arg::Addr:
7562case Arg::Stack:
7563case Arg::CallArg:
7564#if CPU(X86) || CPU(X86_64)
7565OPGEN_RETURN(true);
7566#endif
7567break;
7568break;
7569case Arg::Index:
7570#if CPU(X86) || CPU(X86_64)
7571OPGEN_RETURN(true);
7572#endif
7573break;
7574break;
7575default:
7576break;
7577}
7578break;
7579case Arg::Tmp:
7580switch (opgenHiddenPtrIdentity(kinds)[1]) {
7581case Arg::Addr:
7582case Arg::Stack:
7583case Arg::CallArg:
7584#if CPU(X86) || CPU(X86_64)
7585OPGEN_RETURN(true);
7586#endif
7587break;
7588break;
7589case Arg::Index:
7590#if CPU(X86) || CPU(X86_64)
7591OPGEN_RETURN(true);
7592#endif
7593break;
7594break;
7595default:
7596break;
7597}
7598break;
7599default:
7600break;
7601}
7602break;
7603default:
7604break;
7605}
7606break;
7607case Opcode::AtomicXor64:
7608switch (sizeof...(Arguments)) {
7609case 2:
7610switch (opgenHiddenPtrIdentity(kinds)[0]) {
7611case Arg::Imm:
7612switch (opgenHiddenPtrIdentity(kinds)[1]) {
7613case Arg::Addr:
7614case Arg::Stack:
7615case Arg::CallArg:
7616#if CPU(X86_64)
7617OPGEN_RETURN(true);
7618#endif
7619break;
7620break;
7621case Arg::Index:
7622#if CPU(X86_64)
7623OPGEN_RETURN(true);
7624#endif
7625break;
7626break;
7627default:
7628break;
7629}
7630break;
7631case Arg::Tmp:
7632switch (opgenHiddenPtrIdentity(kinds)[1]) {
7633case Arg::Addr:
7634case Arg::Stack:
7635case Arg::CallArg:
7636#if CPU(X86_64)
7637OPGEN_RETURN(true);
7638#endif
7639break;
7640break;
7641case Arg::Index:
7642#if CPU(X86_64)
7643OPGEN_RETURN(true);
7644#endif
7645break;
7646break;
7647default:
7648break;
7649}
7650break;
7651default:
7652break;
7653}
7654break;
7655default:
7656break;
7657}
7658break;
7659case Opcode::AtomicNeg8:
7660switch (sizeof...(Arguments)) {
7661case 1:
7662switch (opgenHiddenPtrIdentity(kinds)[0]) {
7663case Arg::Addr:
7664case Arg::Stack:
7665case Arg::CallArg:
7666#if CPU(X86) || CPU(X86_64)
7667OPGEN_RETURN(true);
7668#endif
7669break;
7670break;
7671case Arg::Index:
7672#if CPU(X86) || CPU(X86_64)
7673OPGEN_RETURN(true);
7674#endif
7675break;
7676break;
7677default:
7678break;
7679}
7680break;
7681default:
7682break;
7683}
7684break;
7685case Opcode::AtomicNeg16:
7686switch (sizeof...(Arguments)) {
7687case 1:
7688switch (opgenHiddenPtrIdentity(kinds)[0]) {
7689case Arg::Addr:
7690case Arg::Stack:
7691case Arg::CallArg:
7692#if CPU(X86) || CPU(X86_64)
7693OPGEN_RETURN(true);
7694#endif
7695break;
7696break;
7697case Arg::Index:
7698#if CPU(X86) || CPU(X86_64)
7699OPGEN_RETURN(true);
7700#endif
7701break;
7702break;
7703default:
7704break;
7705}
7706break;
7707default:
7708break;
7709}
7710break;
7711case Opcode::AtomicNeg32:
7712switch (sizeof...(Arguments)) {
7713case 1:
7714switch (opgenHiddenPtrIdentity(kinds)[0]) {
7715case Arg::Addr:
7716case Arg::Stack:
7717case Arg::CallArg:
7718#if CPU(X86) || CPU(X86_64)
7719OPGEN_RETURN(true);
7720#endif
7721break;
7722break;
7723case Arg::Index:
7724#if CPU(X86) || CPU(X86_64)
7725OPGEN_RETURN(true);
7726#endif
7727break;
7728break;
7729default:
7730break;
7731}
7732break;
7733default:
7734break;
7735}
7736break;
7737case Opcode::AtomicNeg64:
7738switch (sizeof...(Arguments)) {
7739case 1:
7740switch (opgenHiddenPtrIdentity(kinds)[0]) {
7741case Arg::Addr:
7742case Arg::Stack:
7743case Arg::CallArg:
7744#if CPU(X86_64)
7745OPGEN_RETURN(true);
7746#endif
7747break;
7748break;
7749case Arg::Index:
7750#if CPU(X86_64)
7751OPGEN_RETURN(true);
7752#endif
7753break;
7754break;
7755default:
7756break;
7757}
7758break;
7759default:
7760break;
7761}
7762break;
7763case Opcode::AtomicNot8:
7764switch (sizeof...(Arguments)) {
7765case 1:
7766switch (opgenHiddenPtrIdentity(kinds)[0]) {
7767case Arg::Addr:
7768case Arg::Stack:
7769case Arg::CallArg:
7770#if CPU(X86) || CPU(X86_64)
7771OPGEN_RETURN(true);
7772#endif
7773break;
7774break;
7775case Arg::Index:
7776#if CPU(X86) || CPU(X86_64)
7777OPGEN_RETURN(true);
7778#endif
7779break;
7780break;
7781default:
7782break;
7783}
7784break;
7785default:
7786break;
7787}
7788break;
7789case Opcode::AtomicNot16:
7790switch (sizeof...(Arguments)) {
7791case 1:
7792switch (opgenHiddenPtrIdentity(kinds)[0]) {
7793case Arg::Addr:
7794case Arg::Stack:
7795case Arg::CallArg:
7796#if CPU(X86) || CPU(X86_64)
7797OPGEN_RETURN(true);
7798#endif
7799break;
7800break;
7801case Arg::Index:
7802#if CPU(X86) || CPU(X86_64)
7803OPGEN_RETURN(true);
7804#endif
7805break;
7806break;
7807default:
7808break;
7809}
7810break;
7811default:
7812break;
7813}
7814break;
7815case Opcode::AtomicNot32:
7816switch (sizeof...(Arguments)) {
7817case 1:
7818switch (opgenHiddenPtrIdentity(kinds)[0]) {
7819case Arg::Addr:
7820case Arg::Stack:
7821case Arg::CallArg:
7822#if CPU(X86) || CPU(X86_64)
7823OPGEN_RETURN(true);
7824#endif
7825break;
7826break;
7827case Arg::Index:
7828#if CPU(X86) || CPU(X86_64)
7829OPGEN_RETURN(true);
7830#endif
7831break;
7832break;
7833default:
7834break;
7835}
7836break;
7837default:
7838break;
7839}
7840break;
7841case Opcode::AtomicNot64:
7842switch (sizeof...(Arguments)) {
7843case 1:
7844switch (opgenHiddenPtrIdentity(kinds)[0]) {
7845case Arg::Addr:
7846case Arg::Stack:
7847case Arg::CallArg:
7848#if CPU(X86_64)
7849OPGEN_RETURN(true);
7850#endif
7851break;
7852break;
7853case Arg::Index:
7854#if CPU(X86_64)
7855OPGEN_RETURN(true);
7856#endif
7857break;
7858break;
7859default:
7860break;
7861}
7862break;
7863default:
7864break;
7865}
7866break;
7867case Opcode::AtomicXchgAdd8:
7868switch (sizeof...(Arguments)) {
7869case 2:
7870switch (opgenHiddenPtrIdentity(kinds)[0]) {
7871case Arg::Tmp:
7872switch (opgenHiddenPtrIdentity(kinds)[1]) {
7873case Arg::Addr:
7874case Arg::Stack:
7875case Arg::CallArg:
7876#if CPU(X86) || CPU(X86_64)
7877OPGEN_RETURN(true);
7878#endif
7879break;
7880break;
7881case Arg::Index:
7882#if CPU(X86) || CPU(X86_64)
7883OPGEN_RETURN(true);
7884#endif
7885break;
7886break;
7887default:
7888break;
7889}
7890break;
7891default:
7892break;
7893}
7894break;
7895default:
7896break;
7897}
7898break;
7899case Opcode::AtomicXchgAdd16:
7900switch (sizeof...(Arguments)) {
7901case 2:
7902switch (opgenHiddenPtrIdentity(kinds)[0]) {
7903case Arg::Tmp:
7904switch (opgenHiddenPtrIdentity(kinds)[1]) {
7905case Arg::Addr:
7906case Arg::Stack:
7907case Arg::CallArg:
7908#if CPU(X86) || CPU(X86_64)
7909OPGEN_RETURN(true);
7910#endif
7911break;
7912break;
7913case Arg::Index:
7914#if CPU(X86) || CPU(X86_64)
7915OPGEN_RETURN(true);
7916#endif
7917break;
7918break;
7919default:
7920break;
7921}
7922break;
7923default:
7924break;
7925}
7926break;
7927default:
7928break;
7929}
7930break;
7931case Opcode::AtomicXchgAdd32:
7932switch (sizeof...(Arguments)) {
7933case 2:
7934switch (opgenHiddenPtrIdentity(kinds)[0]) {
7935case Arg::Tmp:
7936switch (opgenHiddenPtrIdentity(kinds)[1]) {
7937case Arg::Addr:
7938case Arg::Stack:
7939case Arg::CallArg:
7940#if CPU(X86) || CPU(X86_64)
7941OPGEN_RETURN(true);
7942#endif
7943break;
7944break;
7945case Arg::Index:
7946#if CPU(X86) || CPU(X86_64)
7947OPGEN_RETURN(true);
7948#endif
7949break;
7950break;
7951default:
7952break;
7953}
7954break;
7955default:
7956break;
7957}
7958break;
7959default:
7960break;
7961}
7962break;
7963case Opcode::AtomicXchgAdd64:
7964switch (sizeof...(Arguments)) {
7965case 2:
7966switch (opgenHiddenPtrIdentity(kinds)[0]) {
7967case Arg::Tmp:
7968switch (opgenHiddenPtrIdentity(kinds)[1]) {
7969case Arg::Addr:
7970case Arg::Stack:
7971case Arg::CallArg:
7972#if CPU(X86_64)
7973OPGEN_RETURN(true);
7974#endif
7975break;
7976break;
7977case Arg::Index:
7978#if CPU(X86_64)
7979OPGEN_RETURN(true);
7980#endif
7981break;
7982break;
7983default:
7984break;
7985}
7986break;
7987default:
7988break;
7989}
7990break;
7991default:
7992break;
7993}
7994break;
7995case Opcode::AtomicXchg8:
7996switch (sizeof...(Arguments)) {
7997case 2:
7998switch (opgenHiddenPtrIdentity(kinds)[0]) {
7999case Arg::Tmp:
8000switch (opgenHiddenPtrIdentity(kinds)[1]) {
8001case Arg::Addr:
8002case Arg::Stack:
8003case Arg::CallArg:
8004#if CPU(X86) || CPU(X86_64)
8005OPGEN_RETURN(true);
8006#endif
8007break;
8008break;
8009case Arg::Index:
8010#if CPU(X86) || CPU(X86_64)
8011OPGEN_RETURN(true);
8012#endif
8013break;
8014break;
8015default:
8016break;
8017}
8018break;
8019default:
8020break;
8021}
8022break;
8023default:
8024break;
8025}
8026break;
8027case Opcode::AtomicXchg16:
8028switch (sizeof...(Arguments)) {
8029case 2:
8030switch (opgenHiddenPtrIdentity(kinds)[0]) {
8031case Arg::Tmp:
8032switch (opgenHiddenPtrIdentity(kinds)[1]) {
8033case Arg::Addr:
8034case Arg::Stack:
8035case Arg::CallArg:
8036#if CPU(X86) || CPU(X86_64)
8037OPGEN_RETURN(true);
8038#endif
8039break;
8040break;
8041case Arg::Index:
8042#if CPU(X86) || CPU(X86_64)
8043OPGEN_RETURN(true);
8044#endif
8045break;
8046break;
8047default:
8048break;
8049}
8050break;
8051default:
8052break;
8053}
8054break;
8055default:
8056break;
8057}
8058break;
8059case Opcode::AtomicXchg32:
8060switch (sizeof...(Arguments)) {
8061case 2:
8062switch (opgenHiddenPtrIdentity(kinds)[0]) {
8063case Arg::Tmp:
8064switch (opgenHiddenPtrIdentity(kinds)[1]) {
8065case Arg::Addr:
8066case Arg::Stack:
8067case Arg::CallArg:
8068#if CPU(X86) || CPU(X86_64)
8069OPGEN_RETURN(true);
8070#endif
8071break;
8072break;
8073case Arg::Index:
8074#if CPU(X86) || CPU(X86_64)
8075OPGEN_RETURN(true);
8076#endif
8077break;
8078break;
8079default:
8080break;
8081}
8082break;
8083default:
8084break;
8085}
8086break;
8087default:
8088break;
8089}
8090break;
8091case Opcode::AtomicXchg64:
8092switch (sizeof...(Arguments)) {
8093case 2:
8094switch (opgenHiddenPtrIdentity(kinds)[0]) {
8095case Arg::Tmp:
8096switch (opgenHiddenPtrIdentity(kinds)[1]) {
8097case Arg::Addr:
8098case Arg::Stack:
8099case Arg::CallArg:
8100#if CPU(X86_64)
8101OPGEN_RETURN(true);
8102#endif
8103break;
8104break;
8105case Arg::Index:
8106#if CPU(X86_64)
8107OPGEN_RETURN(true);
8108#endif
8109break;
8110break;
8111default:
8112break;
8113}
8114break;
8115default:
8116break;
8117}
8118break;
8119default:
8120break;
8121}
8122break;
8123case Opcode::LoadLink8:
8124switch (sizeof...(Arguments)) {
8125case 2:
8126switch (opgenHiddenPtrIdentity(kinds)[0]) {
8127case Arg::SimpleAddr:
8128switch (opgenHiddenPtrIdentity(kinds)[1]) {
8129case Arg::Tmp:
8130#if CPU(ARM64)
8131OPGEN_RETURN(true);
8132#endif
8133break;
8134break;
8135default:
8136break;
8137}
8138break;
8139default:
8140break;
8141}
8142break;
8143default:
8144break;
8145}
8146break;
8147case Opcode::LoadLinkAcq8:
8148switch (sizeof...(Arguments)) {
8149case 2:
8150switch (opgenHiddenPtrIdentity(kinds)[0]) {
8151case Arg::SimpleAddr:
8152switch (opgenHiddenPtrIdentity(kinds)[1]) {
8153case Arg::Tmp:
8154#if CPU(ARM64)
8155OPGEN_RETURN(true);
8156#endif
8157break;
8158break;
8159default:
8160break;
8161}
8162break;
8163default:
8164break;
8165}
8166break;
8167default:
8168break;
8169}
8170break;
8171case Opcode::StoreCond8:
8172switch (sizeof...(Arguments)) {
8173case 3:
8174switch (opgenHiddenPtrIdentity(kinds)[0]) {
8175case Arg::Tmp:
8176switch (opgenHiddenPtrIdentity(kinds)[1]) {
8177case Arg::SimpleAddr:
8178switch (opgenHiddenPtrIdentity(kinds)[2]) {
8179case Arg::Tmp:
8180#if CPU(ARM64)
8181OPGEN_RETURN(true);
8182#endif
8183break;
8184break;
8185default:
8186break;
8187}
8188break;
8189default:
8190break;
8191}
8192break;
8193default:
8194break;
8195}
8196break;
8197default:
8198break;
8199}
8200break;
8201case Opcode::StoreCondRel8:
8202switch (sizeof...(Arguments)) {
8203case 3:
8204switch (opgenHiddenPtrIdentity(kinds)[0]) {
8205case Arg::Tmp:
8206switch (opgenHiddenPtrIdentity(kinds)[1]) {
8207case Arg::SimpleAddr:
8208switch (opgenHiddenPtrIdentity(kinds)[2]) {
8209case Arg::Tmp:
8210#if CPU(ARM64)
8211OPGEN_RETURN(true);
8212#endif
8213break;
8214break;
8215default:
8216break;
8217}
8218break;
8219default:
8220break;
8221}
8222break;
8223default:
8224break;
8225}
8226break;
8227default:
8228break;
8229}
8230break;
8231case Opcode::LoadLink16:
8232switch (sizeof...(Arguments)) {
8233case 2:
8234switch (opgenHiddenPtrIdentity(kinds)[0]) {
8235case Arg::SimpleAddr:
8236switch (opgenHiddenPtrIdentity(kinds)[1]) {
8237case Arg::Tmp:
8238#if CPU(ARM64)
8239OPGEN_RETURN(true);
8240#endif
8241break;
8242break;
8243default:
8244break;
8245}
8246break;
8247default:
8248break;
8249}
8250break;
8251default:
8252break;
8253}
8254break;
8255case Opcode::LoadLinkAcq16:
8256switch (sizeof...(Arguments)) {
8257case 2:
8258switch (opgenHiddenPtrIdentity(kinds)[0]) {
8259case Arg::SimpleAddr:
8260switch (opgenHiddenPtrIdentity(kinds)[1]) {
8261case Arg::Tmp:
8262#if CPU(ARM64)
8263OPGEN_RETURN(true);
8264#endif
8265break;
8266break;
8267default:
8268break;
8269}
8270break;
8271default:
8272break;
8273}
8274break;
8275default:
8276break;
8277}
8278break;
8279case Opcode::StoreCond16:
8280switch (sizeof...(Arguments)) {
8281case 3:
8282switch (opgenHiddenPtrIdentity(kinds)[0]) {
8283case Arg::Tmp:
8284switch (opgenHiddenPtrIdentity(kinds)[1]) {
8285case Arg::SimpleAddr:
8286switch (opgenHiddenPtrIdentity(kinds)[2]) {
8287case Arg::Tmp:
8288#if CPU(ARM64)
8289OPGEN_RETURN(true);
8290#endif
8291break;
8292break;
8293default:
8294break;
8295}
8296break;
8297default:
8298break;
8299}
8300break;
8301default:
8302break;
8303}
8304break;
8305default:
8306break;
8307}
8308break;
8309case Opcode::StoreCondRel16:
8310switch (sizeof...(Arguments)) {
8311case 3:
8312switch (opgenHiddenPtrIdentity(kinds)[0]) {
8313case Arg::Tmp:
8314switch (opgenHiddenPtrIdentity(kinds)[1]) {
8315case Arg::SimpleAddr:
8316switch (opgenHiddenPtrIdentity(kinds)[2]) {
8317case Arg::Tmp:
8318#if CPU(ARM64)
8319OPGEN_RETURN(true);
8320#endif
8321break;
8322break;
8323default:
8324break;
8325}
8326break;
8327default:
8328break;
8329}
8330break;
8331default:
8332break;
8333}
8334break;
8335default:
8336break;
8337}
8338break;
8339case Opcode::LoadLink32:
8340switch (sizeof...(Arguments)) {
8341case 2:
8342switch (opgenHiddenPtrIdentity(kinds)[0]) {
8343case Arg::SimpleAddr:
8344switch (opgenHiddenPtrIdentity(kinds)[1]) {
8345case Arg::Tmp:
8346#if CPU(ARM64)
8347OPGEN_RETURN(true);
8348#endif
8349break;
8350break;
8351default:
8352break;
8353}
8354break;
8355default:
8356break;
8357}
8358break;
8359default:
8360break;
8361}
8362break;
8363case Opcode::LoadLinkAcq32:
8364switch (sizeof...(Arguments)) {
8365case 2:
8366switch (opgenHiddenPtrIdentity(kinds)[0]) {
8367case Arg::SimpleAddr:
8368switch (opgenHiddenPtrIdentity(kinds)[1]) {
8369case Arg::Tmp:
8370#if CPU(ARM64)
8371OPGEN_RETURN(true);
8372#endif
8373break;
8374break;
8375default:
8376break;
8377}
8378break;
8379default:
8380break;
8381}
8382break;
8383default:
8384break;
8385}
8386break;
8387case Opcode::StoreCond32:
8388switch (sizeof...(Arguments)) {
8389case 3:
8390switch (opgenHiddenPtrIdentity(kinds)[0]) {
8391case Arg::Tmp:
8392switch (opgenHiddenPtrIdentity(kinds)[1]) {
8393case Arg::SimpleAddr:
8394switch (opgenHiddenPtrIdentity(kinds)[2]) {
8395case Arg::Tmp:
8396#if CPU(ARM64)
8397OPGEN_RETURN(true);
8398#endif
8399break;
8400break;
8401default:
8402break;
8403}
8404break;
8405default:
8406break;
8407}
8408break;
8409default:
8410break;
8411}
8412break;
8413default:
8414break;
8415}
8416break;
8417case Opcode::StoreCondRel32:
8418switch (sizeof...(Arguments)) {
8419case 3:
8420switch (opgenHiddenPtrIdentity(kinds)[0]) {
8421case Arg::Tmp:
8422switch (opgenHiddenPtrIdentity(kinds)[1]) {
8423case Arg::SimpleAddr:
8424switch (opgenHiddenPtrIdentity(kinds)[2]) {
8425case Arg::Tmp:
8426#if CPU(ARM64)
8427OPGEN_RETURN(true);
8428#endif
8429break;
8430break;
8431default:
8432break;
8433}
8434break;
8435default:
8436break;
8437}
8438break;
8439default:
8440break;
8441}
8442break;
8443default:
8444break;
8445}
8446break;
8447case Opcode::LoadLink64:
8448switch (sizeof...(Arguments)) {
8449case 2:
8450switch (opgenHiddenPtrIdentity(kinds)[0]) {
8451case Arg::SimpleAddr:
8452switch (opgenHiddenPtrIdentity(kinds)[1]) {
8453case Arg::Tmp:
8454#if CPU(ARM64)
8455OPGEN_RETURN(true);
8456#endif
8457break;
8458break;
8459default:
8460break;
8461}
8462break;
8463default:
8464break;
8465}
8466break;
8467default:
8468break;
8469}
8470break;
8471case Opcode::LoadLinkAcq64:
8472switch (sizeof...(Arguments)) {
8473case 2:
8474switch (opgenHiddenPtrIdentity(kinds)[0]) {
8475case Arg::SimpleAddr:
8476switch (opgenHiddenPtrIdentity(kinds)[1]) {
8477case Arg::Tmp:
8478#if CPU(ARM64)
8479OPGEN_RETURN(true);
8480#endif
8481break;
8482break;
8483default:
8484break;
8485}
8486break;
8487default:
8488break;
8489}
8490break;
8491default:
8492break;
8493}
8494break;
8495case Opcode::StoreCond64:
8496switch (sizeof...(Arguments)) {
8497case 3:
8498switch (opgenHiddenPtrIdentity(kinds)[0]) {
8499case Arg::Tmp:
8500switch (opgenHiddenPtrIdentity(kinds)[1]) {
8501case Arg::SimpleAddr:
8502switch (opgenHiddenPtrIdentity(kinds)[2]) {
8503case Arg::Tmp:
8504#if CPU(ARM64)
8505OPGEN_RETURN(true);
8506#endif
8507break;
8508break;
8509default:
8510break;
8511}
8512break;
8513default:
8514break;
8515}
8516break;
8517default:
8518break;
8519}
8520break;
8521default:
8522break;
8523}
8524break;
8525case Opcode::StoreCondRel64:
8526switch (sizeof...(Arguments)) {
8527case 3:
8528switch (opgenHiddenPtrIdentity(kinds)[0]) {
8529case Arg::Tmp:
8530switch (opgenHiddenPtrIdentity(kinds)[1]) {
8531case Arg::SimpleAddr:
8532switch (opgenHiddenPtrIdentity(kinds)[2]) {
8533case Arg::Tmp:
8534#if CPU(ARM64)
8535OPGEN_RETURN(true);
8536#endif
8537break;
8538break;
8539default:
8540break;
8541}
8542break;
8543default:
8544break;
8545}
8546break;
8547default:
8548break;
8549}
8550break;
8551default:
8552break;
8553}
8554break;
8555case Opcode::Depend32:
8556switch (sizeof...(Arguments)) {
8557case 2:
8558switch (opgenHiddenPtrIdentity(kinds)[0]) {
8559case Arg::Tmp:
8560switch (opgenHiddenPtrIdentity(kinds)[1]) {
8561case Arg::Tmp:
8562#if CPU(ARM64)
8563OPGEN_RETURN(true);
8564#endif
8565break;
8566break;
8567default:
8568break;
8569}
8570break;
8571default:
8572break;
8573}
8574break;
8575default:
8576break;
8577}
8578break;
8579case Opcode::Depend64:
8580switch (sizeof...(Arguments)) {
8581case 2:
8582switch (opgenHiddenPtrIdentity(kinds)[0]) {
8583case Arg::Tmp:
8584switch (opgenHiddenPtrIdentity(kinds)[1]) {
8585case Arg::Tmp:
8586#if CPU(ARM64)
8587OPGEN_RETURN(true);
8588#endif
8589break;
8590break;
8591default:
8592break;
8593}
8594break;
8595default:
8596break;
8597}
8598break;
8599default:
8600break;
8601}
8602break;
8603case Opcode::Compare32:
8604switch (sizeof...(Arguments)) {
8605case 4:
8606switch (opgenHiddenPtrIdentity(kinds)[0]) {
8607case Arg::RelCond:
8608switch (opgenHiddenPtrIdentity(kinds)[1]) {
8609case Arg::Tmp:
8610switch (opgenHiddenPtrIdentity(kinds)[2]) {
8611case Arg::Tmp:
8612switch (opgenHiddenPtrIdentity(kinds)[3]) {
8613case Arg::Tmp:
8614OPGEN_RETURN(true);
8615break;
8616break;
8617default:
8618break;
8619}
8620break;
8621case Arg::Imm:
8622switch (opgenHiddenPtrIdentity(kinds)[3]) {
8623case Arg::Tmp:
8624OPGEN_RETURN(true);
8625break;
8626break;
8627default:
8628break;
8629}
8630break;
8631default:
8632break;
8633}
8634break;
8635default:
8636break;
8637}
8638break;
8639default:
8640break;
8641}
8642break;
8643default:
8644break;
8645}
8646break;
8647case Opcode::Compare64:
8648switch (sizeof...(Arguments)) {
8649case 4:
8650switch (opgenHiddenPtrIdentity(kinds)[0]) {
8651case Arg::RelCond:
8652switch (opgenHiddenPtrIdentity(kinds)[1]) {
8653case Arg::Tmp:
8654switch (opgenHiddenPtrIdentity(kinds)[2]) {
8655case Arg::Tmp:
8656switch (opgenHiddenPtrIdentity(kinds)[3]) {
8657case Arg::Tmp:
8658#if CPU(X86_64) || CPU(ARM64)
8659OPGEN_RETURN(true);
8660#endif
8661break;
8662break;
8663default:
8664break;
8665}
8666break;
8667case Arg::Imm:
8668switch (opgenHiddenPtrIdentity(kinds)[3]) {
8669case Arg::Tmp:
8670#if CPU(X86_64)
8671OPGEN_RETURN(true);
8672#endif
8673break;
8674break;
8675default:
8676break;
8677}
8678break;
8679default:
8680break;
8681}
8682break;
8683default:
8684break;
8685}
8686break;
8687default:
8688break;
8689}
8690break;
8691default:
8692break;
8693}
8694break;
8695case Opcode::Test32:
8696switch (sizeof...(Arguments)) {
8697case 4:
8698switch (opgenHiddenPtrIdentity(kinds)[0]) {
8699case Arg::ResCond:
8700switch (opgenHiddenPtrIdentity(kinds)[1]) {
8701case Arg::Addr:
8702case Arg::Stack:
8703case Arg::CallArg:
8704switch (opgenHiddenPtrIdentity(kinds)[2]) {
8705case Arg::Imm:
8706switch (opgenHiddenPtrIdentity(kinds)[3]) {
8707case Arg::Tmp:
8708#if CPU(X86) || CPU(X86_64)
8709OPGEN_RETURN(true);
8710#endif
8711break;
8712break;
8713default:
8714break;
8715}
8716break;
8717default:
8718break;
8719}
8720break;
8721case Arg::Tmp:
8722switch (opgenHiddenPtrIdentity(kinds)[2]) {
8723case Arg::Tmp:
8724switch (opgenHiddenPtrIdentity(kinds)[3]) {
8725case Arg::Tmp:
8726OPGEN_RETURN(true);
8727break;
8728break;
8729default:
8730break;
8731}
8732break;
8733case Arg::BitImm:
8734switch (opgenHiddenPtrIdentity(kinds)[3]) {
8735case Arg::Tmp:
8736OPGEN_RETURN(true);
8737break;
8738break;
8739default:
8740break;
8741}
8742break;
8743default:
8744break;
8745}
8746break;
8747default:
8748break;
8749}
8750break;
8751default:
8752break;
8753}
8754break;
8755default:
8756break;
8757}
8758break;
8759case Opcode::Test64:
8760switch (sizeof...(Arguments)) {
8761case 4:
8762switch (opgenHiddenPtrIdentity(kinds)[0]) {
8763case Arg::ResCond:
8764switch (opgenHiddenPtrIdentity(kinds)[1]) {
8765case Arg::Tmp:
8766switch (opgenHiddenPtrIdentity(kinds)[2]) {
8767case Arg::Imm:
8768switch (opgenHiddenPtrIdentity(kinds)[3]) {
8769case Arg::Tmp:
8770#if CPU(X86_64)
8771OPGEN_RETURN(true);
8772#endif
8773break;
8774break;
8775default:
8776break;
8777}
8778break;
8779case Arg::Tmp:
8780switch (opgenHiddenPtrIdentity(kinds)[3]) {
8781case Arg::Tmp:
8782#if CPU(X86_64) || CPU(ARM64)
8783OPGEN_RETURN(true);
8784#endif
8785break;
8786break;
8787default:
8788break;
8789}
8790break;
8791default:
8792break;
8793}
8794break;
8795default:
8796break;
8797}
8798break;
8799default:
8800break;
8801}
8802break;
8803default:
8804break;
8805}
8806break;
8807case Opcode::CompareDouble:
8808switch (sizeof...(Arguments)) {
8809case 4:
8810switch (opgenHiddenPtrIdentity(kinds)[0]) {
8811case Arg::DoubleCond:
8812switch (opgenHiddenPtrIdentity(kinds)[1]) {
8813case Arg::Tmp:
8814switch (opgenHiddenPtrIdentity(kinds)[2]) {
8815case Arg::Tmp:
8816switch (opgenHiddenPtrIdentity(kinds)[3]) {
8817case Arg::Tmp:
8818OPGEN_RETURN(true);
8819break;
8820break;
8821default:
8822break;
8823}
8824break;
8825default:
8826break;
8827}
8828break;
8829default:
8830break;
8831}
8832break;
8833default:
8834break;
8835}
8836break;
8837default:
8838break;
8839}
8840break;
8841case Opcode::CompareFloat:
8842switch (sizeof...(Arguments)) {
8843case 4:
8844switch (opgenHiddenPtrIdentity(kinds)[0]) {
8845case Arg::DoubleCond:
8846switch (opgenHiddenPtrIdentity(kinds)[1]) {
8847case Arg::Tmp:
8848switch (opgenHiddenPtrIdentity(kinds)[2]) {
8849case Arg::Tmp:
8850switch (opgenHiddenPtrIdentity(kinds)[3]) {
8851case Arg::Tmp:
8852OPGEN_RETURN(true);
8853break;
8854break;
8855default:
8856break;
8857}
8858break;
8859default:
8860break;
8861}
8862break;
8863default:
8864break;
8865}
8866break;
8867default:
8868break;
8869}
8870break;
8871default:
8872break;
8873}
8874break;
8875case Opcode::Branch8:
8876switch (sizeof...(Arguments)) {
8877case 3:
8878switch (opgenHiddenPtrIdentity(kinds)[0]) {
8879case Arg::RelCond:
8880switch (opgenHiddenPtrIdentity(kinds)[1]) {
8881case Arg::Addr:
8882case Arg::Stack:
8883case Arg::CallArg:
8884switch (opgenHiddenPtrIdentity(kinds)[2]) {
8885case Arg::Imm:
8886#if CPU(X86) || CPU(X86_64)
8887OPGEN_RETURN(true);
8888#endif
8889break;
8890break;
8891default:
8892break;
8893}
8894break;
8895case Arg::Index:
8896switch (opgenHiddenPtrIdentity(kinds)[2]) {
8897case Arg::Imm:
8898#if CPU(X86) || CPU(X86_64)
8899OPGEN_RETURN(true);
8900#endif
8901break;
8902break;
8903default:
8904break;
8905}
8906break;
8907default:
8908break;
8909}
8910break;
8911default:
8912break;
8913}
8914break;
8915default:
8916break;
8917}
8918break;
8919case Opcode::Branch32:
8920switch (sizeof...(Arguments)) {
8921case 3:
8922switch (opgenHiddenPtrIdentity(kinds)[0]) {
8923case Arg::RelCond:
8924switch (opgenHiddenPtrIdentity(kinds)[1]) {
8925case Arg::Addr:
8926case Arg::Stack:
8927case Arg::CallArg:
8928switch (opgenHiddenPtrIdentity(kinds)[2]) {
8929case Arg::Imm:
8930#if CPU(X86) || CPU(X86_64)
8931OPGEN_RETURN(true);
8932#endif
8933break;
8934break;
8935case Arg::Tmp:
8936#if CPU(X86) || CPU(X86_64)
8937OPGEN_RETURN(true);
8938#endif
8939break;
8940break;
8941default:
8942break;
8943}
8944break;
8945case Arg::Tmp:
8946switch (opgenHiddenPtrIdentity(kinds)[2]) {
8947case Arg::Tmp:
8948OPGEN_RETURN(true);
8949break;
8950break;
8951case Arg::Imm:
8952OPGEN_RETURN(true);
8953break;
8954break;
8955case Arg::Addr:
8956case Arg::Stack:
8957case Arg::CallArg:
8958#if CPU(X86) || CPU(X86_64)
8959OPGEN_RETURN(true);
8960#endif
8961break;
8962break;
8963default:
8964break;
8965}
8966break;
8967case Arg::Index:
8968switch (opgenHiddenPtrIdentity(kinds)[2]) {
8969case Arg::Imm:
8970#if CPU(X86) || CPU(X86_64)
8971OPGEN_RETURN(true);
8972#endif
8973break;
8974break;
8975default:
8976break;
8977}
8978break;
8979default:
8980break;
8981}
8982break;
8983default:
8984break;
8985}
8986break;
8987default:
8988break;
8989}
8990break;
8991case Opcode::Branch64:
8992switch (sizeof...(Arguments)) {
8993case 3:
8994switch (opgenHiddenPtrIdentity(kinds)[0]) {
8995case Arg::RelCond:
8996switch (opgenHiddenPtrIdentity(kinds)[1]) {
8997case Arg::Tmp:
8998switch (opgenHiddenPtrIdentity(kinds)[2]) {
8999case Arg::Tmp:
9000#if CPU(X86_64) || CPU(ARM64)
9001OPGEN_RETURN(true);
9002#endif
9003break;
9004break;
9005case Arg::Imm:
9006#if CPU(X86_64) || CPU(ARM64)
9007OPGEN_RETURN(true);
9008#endif
9009break;
9010break;
9011case Arg::Addr:
9012case Arg::Stack:
9013case Arg::CallArg:
9014#if CPU(X86_64)
9015OPGEN_RETURN(true);
9016#endif
9017break;
9018break;
9019default:
9020break;
9021}
9022break;
9023case Arg::Addr:
9024case Arg::Stack:
9025case Arg::CallArg:
9026switch (opgenHiddenPtrIdentity(kinds)[2]) {
9027case Arg::Tmp:
9028#if CPU(X86_64)
9029OPGEN_RETURN(true);
9030#endif
9031break;
9032break;
9033case Arg::Imm:
9034#if CPU(X86_64)
9035OPGEN_RETURN(true);
9036#endif
9037break;
9038break;
9039default:
9040break;
9041}
9042break;
9043case Arg::Index:
9044switch (opgenHiddenPtrIdentity(kinds)[2]) {
9045case Arg::Tmp:
9046#if CPU(X86_64)
9047OPGEN_RETURN(true);
9048#endif
9049break;
9050break;
9051default:
9052break;
9053}
9054break;
9055default:
9056break;
9057}
9058break;
9059default:
9060break;
9061}
9062break;
9063default:
9064break;
9065}
9066break;
9067case Opcode::BranchTest8:
9068switch (sizeof...(Arguments)) {
9069case 3:
9070switch (opgenHiddenPtrIdentity(kinds)[0]) {
9071case Arg::ResCond:
9072switch (opgenHiddenPtrIdentity(kinds)[1]) {
9073case Arg::Addr:
9074case Arg::Stack:
9075case Arg::CallArg:
9076switch (opgenHiddenPtrIdentity(kinds)[2]) {
9077case Arg::BitImm:
9078#if CPU(X86) || CPU(X86_64)
9079OPGEN_RETURN(true);
9080#endif
9081break;
9082break;
9083default:
9084break;
9085}
9086break;
9087case Arg::Index:
9088switch (opgenHiddenPtrIdentity(kinds)[2]) {
9089case Arg::BitImm:
9090#if CPU(X86) || CPU(X86_64)
9091OPGEN_RETURN(true);
9092#endif
9093break;
9094break;
9095default:
9096break;
9097}
9098break;
9099default:
9100break;
9101}
9102break;
9103default:
9104break;
9105}
9106break;
9107default:
9108break;
9109}
9110break;
9111case Opcode::BranchTest32:
9112switch (sizeof...(Arguments)) {
9113case 3:
9114switch (opgenHiddenPtrIdentity(kinds)[0]) {
9115case Arg::ResCond:
9116switch (opgenHiddenPtrIdentity(kinds)[1]) {
9117case Arg::Tmp:
9118switch (opgenHiddenPtrIdentity(kinds)[2]) {
9119case Arg::Tmp:
9120OPGEN_RETURN(true);
9121break;
9122break;
9123case Arg::BitImm:
9124OPGEN_RETURN(true);
9125break;
9126break;
9127default:
9128break;
9129}
9130break;
9131case Arg::Addr:
9132case Arg::Stack:
9133case Arg::CallArg:
9134switch (opgenHiddenPtrIdentity(kinds)[2]) {
9135case Arg::BitImm:
9136#if CPU(X86) || CPU(X86_64)
9137OPGEN_RETURN(true);
9138#endif
9139break;
9140break;
9141default:
9142break;
9143}
9144break;
9145case Arg::Index:
9146switch (opgenHiddenPtrIdentity(kinds)[2]) {
9147case Arg::BitImm:
9148#if CPU(X86) || CPU(X86_64)
9149OPGEN_RETURN(true);
9150#endif
9151break;
9152break;
9153default:
9154break;
9155}
9156break;
9157default:
9158break;
9159}
9160break;
9161default:
9162break;
9163}
9164break;
9165default:
9166break;
9167}
9168break;
9169case Opcode::BranchTest64:
9170switch (sizeof...(Arguments)) {
9171case 3:
9172switch (opgenHiddenPtrIdentity(kinds)[0]) {
9173case Arg::ResCond:
9174switch (opgenHiddenPtrIdentity(kinds)[1]) {
9175case Arg::Tmp:
9176switch (opgenHiddenPtrIdentity(kinds)[2]) {
9177case Arg::Tmp:
9178#if CPU(X86_64) || CPU(ARM64)
9179OPGEN_RETURN(true);
9180#endif
9181break;
9182break;
9183#if USE(JSVALUE64)
9184case Arg::BitImm64:
9185#if CPU(ARM64)
9186OPGEN_RETURN(true);
9187#endif
9188break;
9189break;
9190#endif // USE(JSVALUE64)
9191case Arg::BitImm:
9192#if CPU(X86_64)
9193OPGEN_RETURN(true);
9194#endif
9195break;
9196break;
9197default:
9198break;
9199}
9200break;
9201case Arg::Addr:
9202case Arg::Stack:
9203case Arg::CallArg:
9204switch (opgenHiddenPtrIdentity(kinds)[2]) {
9205case Arg::BitImm:
9206#if CPU(X86_64)
9207OPGEN_RETURN(true);
9208#endif
9209break;
9210break;
9211case Arg::Tmp:
9212#if CPU(X86_64)
9213OPGEN_RETURN(true);
9214#endif
9215break;
9216break;
9217default:
9218break;
9219}
9220break;
9221case Arg::Index:
9222switch (opgenHiddenPtrIdentity(kinds)[2]) {
9223case Arg::BitImm:
9224#if CPU(X86_64)
9225OPGEN_RETURN(true);
9226#endif
9227break;
9228break;
9229default:
9230break;
9231}
9232break;
9233default:
9234break;
9235}
9236break;
9237default:
9238break;
9239}
9240break;
9241default:
9242break;
9243}
9244break;
9245case Opcode::BranchDouble:
9246switch (sizeof...(Arguments)) {
9247case 3:
9248switch (opgenHiddenPtrIdentity(kinds)[0]) {
9249case Arg::DoubleCond:
9250switch (opgenHiddenPtrIdentity(kinds)[1]) {
9251case Arg::Tmp:
9252switch (opgenHiddenPtrIdentity(kinds)[2]) {
9253case Arg::Tmp:
9254OPGEN_RETURN(true);
9255break;
9256break;
9257default:
9258break;
9259}
9260break;
9261default:
9262break;
9263}
9264break;
9265default:
9266break;
9267}
9268break;
9269default:
9270break;
9271}
9272break;
9273case Opcode::BranchFloat:
9274switch (sizeof...(Arguments)) {
9275case 3:
9276switch (opgenHiddenPtrIdentity(kinds)[0]) {
9277case Arg::DoubleCond:
9278switch (opgenHiddenPtrIdentity(kinds)[1]) {
9279case Arg::Tmp:
9280switch (opgenHiddenPtrIdentity(kinds)[2]) {
9281case Arg::Tmp:
9282OPGEN_RETURN(true);
9283break;
9284break;
9285default:
9286break;
9287}
9288break;
9289default:
9290break;
9291}
9292break;
9293default:
9294break;
9295}
9296break;
9297default:
9298break;
9299}
9300break;
9301case Opcode::BranchAdd32:
9302switch (sizeof...(Arguments)) {
9303case 4:
9304switch (opgenHiddenPtrIdentity(kinds)[0]) {
9305case Arg::ResCond:
9306switch (opgenHiddenPtrIdentity(kinds)[1]) {
9307case Arg::Tmp:
9308switch (opgenHiddenPtrIdentity(kinds)[2]) {
9309case Arg::Tmp:
9310switch (opgenHiddenPtrIdentity(kinds)[3]) {
9311case Arg::Tmp:
9312OPGEN_RETURN(true);
9313break;
9314break;
9315default:
9316break;
9317}
9318break;
9319case Arg::Addr:
9320case Arg::Stack:
9321case Arg::CallArg:
9322switch (opgenHiddenPtrIdentity(kinds)[3]) {
9323case Arg::Tmp:
9324#if CPU(X86) || CPU(X86_64)
9325OPGEN_RETURN(true);
9326#endif
9327break;
9328break;
9329default:
9330break;
9331}
9332break;
9333default:
9334break;
9335}
9336break;
9337case Arg::Addr:
9338case Arg::Stack:
9339case Arg::CallArg:
9340switch (opgenHiddenPtrIdentity(kinds)[2]) {
9341case Arg::Tmp:
9342switch (opgenHiddenPtrIdentity(kinds)[3]) {
9343case Arg::Tmp:
9344#if CPU(X86) || CPU(X86_64)
9345OPGEN_RETURN(true);
9346#endif
9347break;
9348break;
9349default:
9350break;
9351}
9352break;
9353default:
9354break;
9355}
9356break;
9357default:
9358break;
9359}
9360break;
9361default:
9362break;
9363}
9364break;
9365case 3:
9366switch (opgenHiddenPtrIdentity(kinds)[0]) {
9367case Arg::ResCond:
9368switch (opgenHiddenPtrIdentity(kinds)[1]) {
9369case Arg::Tmp:
9370switch (opgenHiddenPtrIdentity(kinds)[2]) {
9371case Arg::Tmp:
9372OPGEN_RETURN(true);
9373break;
9374break;
9375case Arg::Addr:
9376case Arg::Stack:
9377case Arg::CallArg:
9378#if CPU(X86) || CPU(X86_64)
9379OPGEN_RETURN(true);
9380#endif
9381break;
9382break;
9383default:
9384break;
9385}
9386break;
9387case Arg::Imm:
9388switch (opgenHiddenPtrIdentity(kinds)[2]) {
9389case Arg::Tmp:
9390OPGEN_RETURN(true);
9391break;
9392break;
9393case Arg::Addr:
9394case Arg::Stack:
9395case Arg::CallArg:
9396#if CPU(X86) || CPU(X86_64)
9397OPGEN_RETURN(true);
9398#endif
9399break;
9400break;
9401default:
9402break;
9403}
9404break;
9405case Arg::Addr:
9406case Arg::Stack:
9407case Arg::CallArg:
9408switch (opgenHiddenPtrIdentity(kinds)[2]) {
9409case Arg::Tmp:
9410#if CPU(X86) || CPU(X86_64)
9411OPGEN_RETURN(true);
9412#endif
9413break;
9414break;
9415default:
9416break;
9417}
9418break;
9419default:
9420break;
9421}
9422break;
9423default:
9424break;
9425}
9426break;
9427default:
9428break;
9429}
9430break;
9431case Opcode::BranchAdd64:
9432switch (sizeof...(Arguments)) {
9433case 4:
9434switch (opgenHiddenPtrIdentity(kinds)[0]) {
9435case Arg::ResCond:
9436switch (opgenHiddenPtrIdentity(kinds)[1]) {
9437case Arg::Tmp:
9438switch (opgenHiddenPtrIdentity(kinds)[2]) {
9439case Arg::Tmp:
9440switch (opgenHiddenPtrIdentity(kinds)[3]) {
9441case Arg::Tmp:
9442OPGEN_RETURN(true);
9443break;
9444break;
9445default:
9446break;
9447}
9448break;
9449case Arg::Addr:
9450case Arg::Stack:
9451case Arg::CallArg:
9452switch (opgenHiddenPtrIdentity(kinds)[3]) {
9453case Arg::Tmp:
9454#if CPU(X86) || CPU(X86_64)
9455OPGEN_RETURN(true);
9456#endif
9457break;
9458break;
9459default:
9460break;
9461}
9462break;
9463default:
9464break;
9465}
9466break;
9467case Arg::Addr:
9468case Arg::Stack:
9469case Arg::CallArg:
9470switch (opgenHiddenPtrIdentity(kinds)[2]) {
9471case Arg::Tmp:
9472switch (opgenHiddenPtrIdentity(kinds)[3]) {
9473case Arg::Tmp:
9474#if CPU(X86) || CPU(X86_64)
9475OPGEN_RETURN(true);
9476#endif
9477break;
9478break;
9479default:
9480break;
9481}
9482break;
9483default:
9484break;
9485}
9486break;
9487default:
9488break;
9489}
9490break;
9491default:
9492break;
9493}
9494break;
9495case 3:
9496switch (opgenHiddenPtrIdentity(kinds)[0]) {
9497case Arg::ResCond:
9498switch (opgenHiddenPtrIdentity(kinds)[1]) {
9499case Arg::Imm:
9500switch (opgenHiddenPtrIdentity(kinds)[2]) {
9501case Arg::Tmp:
9502#if CPU(X86_64) || CPU(ARM64)
9503OPGEN_RETURN(true);
9504#endif
9505break;
9506break;
9507default:
9508break;
9509}
9510break;
9511case Arg::Tmp:
9512switch (opgenHiddenPtrIdentity(kinds)[2]) {
9513case Arg::Tmp:
9514#if CPU(X86_64) || CPU(ARM64)
9515OPGEN_RETURN(true);
9516#endif
9517break;
9518break;
9519default:
9520break;
9521}
9522break;
9523case Arg::Addr:
9524case Arg::Stack:
9525case Arg::CallArg:
9526switch (opgenHiddenPtrIdentity(kinds)[2]) {
9527case Arg::Tmp:
9528#if CPU(X86_64)
9529OPGEN_RETURN(true);
9530#endif
9531break;
9532break;
9533default:
9534break;
9535}
9536break;
9537default:
9538break;
9539}
9540break;
9541default:
9542break;
9543}
9544break;
9545default:
9546break;
9547}
9548break;
9549case Opcode::BranchMul32:
9550switch (sizeof...(Arguments)) {
9551case 3:
9552switch (opgenHiddenPtrIdentity(kinds)[0]) {
9553case Arg::ResCond:
9554switch (opgenHiddenPtrIdentity(kinds)[1]) {
9555case Arg::Tmp:
9556switch (opgenHiddenPtrIdentity(kinds)[2]) {
9557case Arg::Tmp:
9558#if CPU(X86) || CPU(X86_64)
9559OPGEN_RETURN(true);
9560#endif
9561break;
9562break;
9563default:
9564break;
9565}
9566break;
9567case Arg::Addr:
9568case Arg::Stack:
9569case Arg::CallArg:
9570switch (opgenHiddenPtrIdentity(kinds)[2]) {
9571case Arg::Tmp:
9572#if CPU(X86) || CPU(X86_64)
9573OPGEN_RETURN(true);
9574#endif
9575break;
9576break;
9577default:
9578break;
9579}
9580break;
9581default:
9582break;
9583}
9584break;
9585default:
9586break;
9587}
9588break;
9589case 4:
9590switch (opgenHiddenPtrIdentity(kinds)[0]) {
9591case Arg::ResCond:
9592switch (opgenHiddenPtrIdentity(kinds)[1]) {
9593case Arg::Tmp:
9594switch (opgenHiddenPtrIdentity(kinds)[2]) {
9595case Arg::Imm:
9596switch (opgenHiddenPtrIdentity(kinds)[3]) {
9597case Arg::Tmp:
9598#if CPU(X86) || CPU(X86_64)
9599OPGEN_RETURN(true);
9600#endif
9601break;
9602break;
9603default:
9604break;
9605}
9606break;
9607default:
9608break;
9609}
9610break;
9611default:
9612break;
9613}
9614break;
9615default:
9616break;
9617}
9618break;
9619case 6:
9620switch (opgenHiddenPtrIdentity(kinds)[0]) {
9621case Arg::ResCond:
9622switch (opgenHiddenPtrIdentity(kinds)[1]) {
9623case Arg::Tmp:
9624switch (opgenHiddenPtrIdentity(kinds)[2]) {
9625case Arg::Tmp:
9626switch (opgenHiddenPtrIdentity(kinds)[3]) {
9627case Arg::Tmp:
9628switch (opgenHiddenPtrIdentity(kinds)[4]) {
9629case Arg::Tmp:
9630switch (opgenHiddenPtrIdentity(kinds)[5]) {
9631case Arg::Tmp:
9632#if CPU(ARM64)
9633OPGEN_RETURN(true);
9634#endif
9635break;
9636break;
9637default:
9638break;
9639}
9640break;
9641default:
9642break;
9643}
9644break;
9645default:
9646break;
9647}
9648break;
9649default:
9650break;
9651}
9652break;
9653default:
9654break;
9655}
9656break;
9657default:
9658break;
9659}
9660break;
9661default:
9662break;
9663}
9664break;
9665case Opcode::BranchMul64:
9666switch (sizeof...(Arguments)) {
9667case 3:
9668switch (opgenHiddenPtrIdentity(kinds)[0]) {
9669case Arg::ResCond:
9670switch (opgenHiddenPtrIdentity(kinds)[1]) {
9671case Arg::Tmp:
9672switch (opgenHiddenPtrIdentity(kinds)[2]) {
9673case Arg::Tmp:
9674#if CPU(X86_64)
9675OPGEN_RETURN(true);
9676#endif
9677break;
9678break;
9679default:
9680break;
9681}
9682break;
9683default:
9684break;
9685}
9686break;
9687default:
9688break;
9689}
9690break;
9691case 6:
9692switch (opgenHiddenPtrIdentity(kinds)[0]) {
9693case Arg::ResCond:
9694switch (opgenHiddenPtrIdentity(kinds)[1]) {
9695case Arg::Tmp:
9696switch (opgenHiddenPtrIdentity(kinds)[2]) {
9697case Arg::Tmp:
9698switch (opgenHiddenPtrIdentity(kinds)[3]) {
9699case Arg::Tmp:
9700switch (opgenHiddenPtrIdentity(kinds)[4]) {
9701case Arg::Tmp:
9702switch (opgenHiddenPtrIdentity(kinds)[5]) {
9703case Arg::Tmp:
9704#if CPU(ARM64)
9705OPGEN_RETURN(true);
9706#endif
9707break;
9708break;
9709default:
9710break;
9711}
9712break;
9713default:
9714break;
9715}
9716break;
9717default:
9718break;
9719}
9720break;
9721default:
9722break;
9723}
9724break;
9725default:
9726break;
9727}
9728break;
9729default:
9730break;
9731}
9732break;
9733default:
9734break;
9735}
9736break;
9737case Opcode::BranchSub32:
9738switch (sizeof...(Arguments)) {
9739case 3:
9740switch (opgenHiddenPtrIdentity(kinds)[0]) {
9741case Arg::ResCond:
9742switch (opgenHiddenPtrIdentity(kinds)[1]) {
9743case Arg::Tmp:
9744switch (opgenHiddenPtrIdentity(kinds)[2]) {
9745case Arg::Tmp:
9746OPGEN_RETURN(true);
9747break;
9748break;
9749case Arg::Addr:
9750case Arg::Stack:
9751case Arg::CallArg:
9752#if CPU(X86) || CPU(X86_64)
9753OPGEN_RETURN(true);
9754#endif
9755break;
9756break;
9757default:
9758break;
9759}
9760break;
9761case Arg::Imm:
9762switch (opgenHiddenPtrIdentity(kinds)[2]) {
9763case Arg::Tmp:
9764OPGEN_RETURN(true);
9765break;
9766break;
9767case Arg::Addr:
9768case Arg::Stack:
9769case Arg::CallArg:
9770#if CPU(X86) || CPU(X86_64)
9771OPGEN_RETURN(true);
9772#endif
9773break;
9774break;
9775default:
9776break;
9777}
9778break;
9779case Arg::Addr:
9780case Arg::Stack:
9781case Arg::CallArg:
9782switch (opgenHiddenPtrIdentity(kinds)[2]) {
9783case Arg::Tmp:
9784#if CPU(X86) || CPU(X86_64)
9785OPGEN_RETURN(true);
9786#endif
9787break;
9788break;
9789default:
9790break;
9791}
9792break;
9793default:
9794break;
9795}
9796break;
9797default:
9798break;
9799}
9800break;
9801default:
9802break;
9803}
9804break;
9805case Opcode::BranchSub64:
9806switch (sizeof...(Arguments)) {
9807case 3:
9808switch (opgenHiddenPtrIdentity(kinds)[0]) {
9809case Arg::ResCond:
9810switch (opgenHiddenPtrIdentity(kinds)[1]) {
9811case Arg::Imm:
9812switch (opgenHiddenPtrIdentity(kinds)[2]) {
9813case Arg::Tmp:
9814#if CPU(X86_64) || CPU(ARM64)
9815OPGEN_RETURN(true);
9816#endif
9817break;
9818break;
9819default:
9820break;
9821}
9822break;
9823case Arg::Tmp:
9824switch (opgenHiddenPtrIdentity(kinds)[2]) {
9825case Arg::Tmp:
9826#if CPU(X86_64) || CPU(ARM64)
9827OPGEN_RETURN(true);
9828#endif
9829break;
9830break;
9831default:
9832break;
9833}
9834break;
9835default:
9836break;
9837}
9838break;
9839default:
9840break;
9841}
9842break;
9843default:
9844break;
9845}
9846break;
9847case Opcode::BranchNeg32:
9848switch (sizeof...(Arguments)) {
9849case 2:
9850switch (opgenHiddenPtrIdentity(kinds)[0]) {
9851case Arg::ResCond:
9852switch (opgenHiddenPtrIdentity(kinds)[1]) {
9853case Arg::Tmp:
9854OPGEN_RETURN(true);
9855break;
9856break;
9857default:
9858break;
9859}
9860break;
9861default:
9862break;
9863}
9864break;
9865default:
9866break;
9867}
9868break;
9869case Opcode::BranchNeg64:
9870switch (sizeof...(Arguments)) {
9871case 2:
9872switch (opgenHiddenPtrIdentity(kinds)[0]) {
9873case Arg::ResCond:
9874switch (opgenHiddenPtrIdentity(kinds)[1]) {
9875case Arg::Tmp:
9876#if CPU(X86_64) || CPU(ARM64)
9877OPGEN_RETURN(true);
9878#endif
9879break;
9880break;
9881default:
9882break;
9883}
9884break;
9885default:
9886break;
9887}
9888break;
9889default:
9890break;
9891}
9892break;
9893case Opcode::MoveConditionally32:
9894switch (sizeof...(Arguments)) {
9895case 5:
9896switch (opgenHiddenPtrIdentity(kinds)[0]) {
9897case Arg::RelCond:
9898switch (opgenHiddenPtrIdentity(kinds)[1]) {
9899case Arg::Tmp:
9900switch (opgenHiddenPtrIdentity(kinds)[2]) {
9901case Arg::Tmp:
9902switch (opgenHiddenPtrIdentity(kinds)[3]) {
9903case Arg::Tmp:
9904switch (opgenHiddenPtrIdentity(kinds)[4]) {
9905case Arg::Tmp:
9906OPGEN_RETURN(true);
9907break;
9908break;
9909default:
9910break;
9911}
9912break;
9913default:
9914break;
9915}
9916break;
9917default:
9918break;
9919}
9920break;
9921default:
9922break;
9923}
9924break;
9925default:
9926break;
9927}
9928break;
9929case 6:
9930switch (opgenHiddenPtrIdentity(kinds)[0]) {
9931case Arg::RelCond:
9932switch (opgenHiddenPtrIdentity(kinds)[1]) {
9933case Arg::Tmp:
9934switch (opgenHiddenPtrIdentity(kinds)[2]) {
9935case Arg::Tmp:
9936switch (opgenHiddenPtrIdentity(kinds)[3]) {
9937case Arg::Tmp:
9938switch (opgenHiddenPtrIdentity(kinds)[4]) {
9939case Arg::Tmp:
9940switch (opgenHiddenPtrIdentity(kinds)[5]) {
9941case Arg::Tmp:
9942OPGEN_RETURN(true);
9943break;
9944break;
9945default:
9946break;
9947}
9948break;
9949default:
9950break;
9951}
9952break;
9953default:
9954break;
9955}
9956break;
9957case Arg::Imm:
9958switch (opgenHiddenPtrIdentity(kinds)[3]) {
9959case Arg::Tmp:
9960switch (opgenHiddenPtrIdentity(kinds)[4]) {
9961case Arg::Tmp:
9962switch (opgenHiddenPtrIdentity(kinds)[5]) {
9963case Arg::Tmp:
9964OPGEN_RETURN(true);
9965break;
9966break;
9967default:
9968break;
9969}
9970break;
9971default:
9972break;
9973}
9974break;
9975default:
9976break;
9977}
9978break;
9979default:
9980break;
9981}
9982break;
9983default:
9984break;
9985}
9986break;
9987default:
9988break;
9989}
9990break;
9991default:
9992break;
9993}
9994break;
9995case Opcode::MoveConditionally64:
9996switch (sizeof...(Arguments)) {
9997case 5:
9998switch (opgenHiddenPtrIdentity(kinds)[0]) {
9999case Arg::RelCond:
10000switch (opgenHiddenPtrIdentity(kinds)[1]) {
10001case Arg::Tmp:
10002switch (opgenHiddenPtrIdentity(kinds)[2]) {
10003case Arg::Tmp:
10004switch (opgenHiddenPtrIdentity(kinds)[3]) {
10005case Arg::Tmp:
10006switch (opgenHiddenPtrIdentity(kinds)[4]) {
10007case Arg::Tmp:
10008#if CPU(X86_64) || CPU(ARM64)
10009OPGEN_RETURN(true);
10010#endif
10011break;
10012break;
10013default:
10014break;
10015}
10016break;
10017default:
10018break;
10019}
10020break;
10021default:
10022break;
10023}
10024break;
10025default:
10026break;
10027}
10028break;
10029default:
10030break;
10031}
10032break;
10033case 6:
10034switch (opgenHiddenPtrIdentity(kinds)[0]) {
10035case Arg::RelCond:
10036switch (opgenHiddenPtrIdentity(kinds)[1]) {
10037case Arg::Tmp:
10038switch (opgenHiddenPtrIdentity(kinds)[2]) {
10039case Arg::Tmp:
10040switch (opgenHiddenPtrIdentity(kinds)[3]) {
10041case Arg::Tmp:
10042switch (opgenHiddenPtrIdentity(kinds)[4]) {
10043case Arg::Tmp:
10044switch (opgenHiddenPtrIdentity(kinds)[5]) {
10045case Arg::Tmp:
10046#if CPU(X86_64) || CPU(ARM64)
10047OPGEN_RETURN(true);
10048#endif
10049break;
10050break;
10051default:
10052break;
10053}
10054break;
10055default:
10056break;
10057}
10058break;
10059default:
10060break;
10061}
10062break;
10063case Arg::Imm:
10064switch (opgenHiddenPtrIdentity(kinds)[3]) {
10065case Arg::Tmp:
10066switch (opgenHiddenPtrIdentity(kinds)[4]) {
10067case Arg::Tmp:
10068switch (opgenHiddenPtrIdentity(kinds)[5]) {
10069case Arg::Tmp:
10070#if CPU(X86_64) || CPU(ARM64)
10071OPGEN_RETURN(true);
10072#endif
10073break;
10074break;
10075default:
10076break;
10077}
10078break;
10079default:
10080break;
10081}
10082break;
10083default:
10084break;
10085}
10086break;
10087default:
10088break;
10089}
10090break;
10091default:
10092break;
10093}
10094break;
10095default:
10096break;
10097}
10098break;
10099default:
10100break;
10101}
10102break;
10103case Opcode::MoveConditionallyTest32:
10104switch (sizeof...(Arguments)) {
10105case 5:
10106switch (opgenHiddenPtrIdentity(kinds)[0]) {
10107case Arg::ResCond:
10108switch (opgenHiddenPtrIdentity(kinds)[1]) {
10109case Arg::Tmp:
10110switch (opgenHiddenPtrIdentity(kinds)[2]) {
10111case Arg::Tmp:
10112switch (opgenHiddenPtrIdentity(kinds)[3]) {
10113case Arg::Tmp:
10114switch (opgenHiddenPtrIdentity(kinds)[4]) {
10115case Arg::Tmp:
10116OPGEN_RETURN(true);
10117break;
10118break;
10119default:
10120break;
10121}
10122break;
10123default:
10124break;
10125}
10126break;
10127case Arg::Imm:
10128switch (opgenHiddenPtrIdentity(kinds)[3]) {
10129case Arg::Tmp:
10130switch (opgenHiddenPtrIdentity(kinds)[4]) {
10131case Arg::Tmp:
10132#if CPU(X86) || CPU(X86_64)
10133OPGEN_RETURN(true);
10134#endif
10135break;
10136break;
10137default:
10138break;
10139}
10140break;
10141default:
10142break;
10143}
10144break;
10145default:
10146break;
10147}
10148break;
10149default:
10150break;
10151}
10152break;
10153default:
10154break;
10155}
10156break;
10157case 6:
10158switch (opgenHiddenPtrIdentity(kinds)[0]) {
10159case Arg::ResCond:
10160switch (opgenHiddenPtrIdentity(kinds)[1]) {
10161case Arg::Tmp:
10162switch (opgenHiddenPtrIdentity(kinds)[2]) {
10163case Arg::Tmp:
10164switch (opgenHiddenPtrIdentity(kinds)[3]) {
10165case Arg::Tmp:
10166switch (opgenHiddenPtrIdentity(kinds)[4]) {
10167case Arg::Tmp:
10168switch (opgenHiddenPtrIdentity(kinds)[5]) {
10169case Arg::Tmp:
10170OPGEN_RETURN(true);
10171break;
10172break;
10173default:
10174break;
10175}
10176break;
10177default:
10178break;
10179}
10180break;
10181default:
10182break;
10183}
10184break;
10185case Arg::BitImm:
10186switch (opgenHiddenPtrIdentity(kinds)[3]) {
10187case Arg::Tmp:
10188switch (opgenHiddenPtrIdentity(kinds)[4]) {
10189case Arg::Tmp:
10190switch (opgenHiddenPtrIdentity(kinds)[5]) {
10191case Arg::Tmp:
10192OPGEN_RETURN(true);
10193break;
10194break;
10195default:
10196break;
10197}
10198break;
10199default:
10200break;
10201}
10202break;
10203default:
10204break;
10205}
10206break;
10207default:
10208break;
10209}
10210break;
10211default:
10212break;
10213}
10214break;
10215default:
10216break;
10217}
10218break;
10219default:
10220break;
10221}
10222break;
10223case Opcode::MoveConditionallyTest64:
10224switch (sizeof...(Arguments)) {
10225case 5:
10226switch (opgenHiddenPtrIdentity(kinds)[0]) {
10227case Arg::ResCond:
10228switch (opgenHiddenPtrIdentity(kinds)[1]) {
10229case Arg::Tmp:
10230switch (opgenHiddenPtrIdentity(kinds)[2]) {
10231case Arg::Tmp:
10232switch (opgenHiddenPtrIdentity(kinds)[3]) {
10233case Arg::Tmp:
10234switch (opgenHiddenPtrIdentity(kinds)[4]) {
10235case Arg::Tmp:
10236#if CPU(X86_64) || CPU(ARM64)
10237OPGEN_RETURN(true);
10238#endif
10239break;
10240break;
10241default:
10242break;
10243}
10244break;
10245default:
10246break;
10247}
10248break;
10249case Arg::Imm:
10250switch (opgenHiddenPtrIdentity(kinds)[3]) {
10251case Arg::Tmp:
10252switch (opgenHiddenPtrIdentity(kinds)[4]) {
10253case Arg::Tmp:
10254#if CPU(X86_64)
10255OPGEN_RETURN(true);
10256#endif
10257break;
10258break;
10259default:
10260break;
10261}
10262break;
10263default:
10264break;
10265}
10266break;
10267default:
10268break;
10269}
10270break;
10271default:
10272break;
10273}
10274break;
10275default:
10276break;
10277}
10278break;
10279case 6:
10280switch (opgenHiddenPtrIdentity(kinds)[0]) {
10281case Arg::ResCond:
10282switch (opgenHiddenPtrIdentity(kinds)[1]) {
10283case Arg::Tmp:
10284switch (opgenHiddenPtrIdentity(kinds)[2]) {
10285case Arg::Tmp:
10286switch (opgenHiddenPtrIdentity(kinds)[3]) {
10287case Arg::Tmp:
10288switch (opgenHiddenPtrIdentity(kinds)[4]) {
10289case Arg::Tmp:
10290switch (opgenHiddenPtrIdentity(kinds)[5]) {
10291case Arg::Tmp:
10292#if CPU(X86_64) || CPU(ARM64)
10293OPGEN_RETURN(true);
10294#endif
10295break;
10296break;
10297default:
10298break;
10299}
10300break;
10301default:
10302break;
10303}
10304break;
10305default:
10306break;
10307}
10308break;
10309case Arg::Imm:
10310switch (opgenHiddenPtrIdentity(kinds)[3]) {
10311case Arg::Tmp:
10312switch (opgenHiddenPtrIdentity(kinds)[4]) {
10313case Arg::Tmp:
10314switch (opgenHiddenPtrIdentity(kinds)[5]) {
10315case Arg::Tmp:
10316#if CPU(X86_64)
10317OPGEN_RETURN(true);
10318#endif
10319break;
10320break;
10321default:
10322break;
10323}
10324break;
10325default:
10326break;
10327}
10328break;
10329default:
10330break;
10331}
10332break;
10333default:
10334break;
10335}
10336break;
10337default:
10338break;
10339}
10340break;
10341default:
10342break;
10343}
10344break;
10345default:
10346break;
10347}
10348break;
10349case Opcode::MoveConditionallyDouble:
10350switch (sizeof...(Arguments)) {
10351case 6:
10352switch (opgenHiddenPtrIdentity(kinds)[0]) {
10353case Arg::DoubleCond:
10354switch (opgenHiddenPtrIdentity(kinds)[1]) {
10355case Arg::Tmp:
10356switch (opgenHiddenPtrIdentity(kinds)[2]) {
10357case Arg::Tmp:
10358switch (opgenHiddenPtrIdentity(kinds)[3]) {
10359case Arg::Tmp:
10360switch (opgenHiddenPtrIdentity(kinds)[4]) {
10361case Arg::Tmp:
10362switch (opgenHiddenPtrIdentity(kinds)[5]) {
10363case Arg::Tmp:
10364OPGEN_RETURN(true);
10365break;
10366break;
10367default:
10368break;
10369}
10370break;
10371default:
10372break;
10373}
10374break;
10375default:
10376break;
10377}
10378break;
10379default:
10380break;
10381}
10382break;
10383default:
10384break;
10385}
10386break;
10387default:
10388break;
10389}
10390break;
10391case 5:
10392switch (opgenHiddenPtrIdentity(kinds)[0]) {
10393case Arg::DoubleCond:
10394switch (opgenHiddenPtrIdentity(kinds)[1]) {
10395case Arg::Tmp:
10396switch (opgenHiddenPtrIdentity(kinds)[2]) {
10397case Arg::Tmp:
10398switch (opgenHiddenPtrIdentity(kinds)[3]) {
10399case Arg::Tmp:
10400switch (opgenHiddenPtrIdentity(kinds)[4]) {
10401case Arg::Tmp:
10402OPGEN_RETURN(true);
10403break;
10404break;
10405default:
10406break;
10407}
10408break;
10409default:
10410break;
10411}
10412break;
10413default:
10414break;
10415}
10416break;
10417default:
10418break;
10419}
10420break;
10421default:
10422break;
10423}
10424break;
10425default:
10426break;
10427}
10428break;
10429case Opcode::MoveConditionallyFloat:
10430switch (sizeof...(Arguments)) {
10431case 6:
10432switch (opgenHiddenPtrIdentity(kinds)[0]) {
10433case Arg::DoubleCond:
10434switch (opgenHiddenPtrIdentity(kinds)[1]) {
10435case Arg::Tmp:
10436switch (opgenHiddenPtrIdentity(kinds)[2]) {
10437case Arg::Tmp:
10438switch (opgenHiddenPtrIdentity(kinds)[3]) {
10439case Arg::Tmp:
10440switch (opgenHiddenPtrIdentity(kinds)[4]) {
10441case Arg::Tmp:
10442switch (opgenHiddenPtrIdentity(kinds)[5]) {
10443case Arg::Tmp:
10444OPGEN_RETURN(true);
10445break;
10446break;
10447default:
10448break;
10449}
10450break;
10451default:
10452break;
10453}
10454break;
10455default:
10456break;
10457}
10458break;
10459default:
10460break;
10461}
10462break;
10463default:
10464break;
10465}
10466break;
10467default:
10468break;
10469}
10470break;
10471case 5:
10472switch (opgenHiddenPtrIdentity(kinds)[0]) {
10473case Arg::DoubleCond:
10474switch (opgenHiddenPtrIdentity(kinds)[1]) {
10475case Arg::Tmp:
10476switch (opgenHiddenPtrIdentity(kinds)[2]) {
10477case Arg::Tmp:
10478switch (opgenHiddenPtrIdentity(kinds)[3]) {
10479case Arg::Tmp:
10480switch (opgenHiddenPtrIdentity(kinds)[4]) {
10481case Arg::Tmp:
10482OPGEN_RETURN(true);
10483break;
10484break;
10485default:
10486break;
10487}
10488break;
10489default:
10490break;
10491}
10492break;
10493default:
10494break;
10495}
10496break;
10497default:
10498break;
10499}
10500break;
10501default:
10502break;
10503}
10504break;
10505default:
10506break;
10507}
10508break;
10509case Opcode::MoveDoubleConditionally32:
10510switch (sizeof...(Arguments)) {
10511case 6:
10512switch (opgenHiddenPtrIdentity(kinds)[0]) {
10513case Arg::RelCond:
10514switch (opgenHiddenPtrIdentity(kinds)[1]) {
10515case Arg::Tmp:
10516switch (opgenHiddenPtrIdentity(kinds)[2]) {
10517case Arg::Tmp:
10518switch (opgenHiddenPtrIdentity(kinds)[3]) {
10519case Arg::Tmp:
10520switch (opgenHiddenPtrIdentity(kinds)[4]) {
10521case Arg::Tmp:
10522switch (opgenHiddenPtrIdentity(kinds)[5]) {
10523case Arg::Tmp:
10524OPGEN_RETURN(true);
10525break;
10526break;
10527default:
10528break;
10529}
10530break;
10531default:
10532break;
10533}
10534break;
10535default:
10536break;
10537}
10538break;
10539case Arg::Imm:
10540switch (opgenHiddenPtrIdentity(kinds)[3]) {
10541case Arg::Tmp:
10542switch (opgenHiddenPtrIdentity(kinds)[4]) {
10543case Arg::Tmp:
10544switch (opgenHiddenPtrIdentity(kinds)[5]) {
10545case Arg::Tmp:
10546OPGEN_RETURN(true);
10547break;
10548break;
10549default:
10550break;
10551}
10552break;
10553default:
10554break;
10555}
10556break;
10557default:
10558break;
10559}
10560break;
10561case Arg::Addr:
10562case Arg::Stack:
10563case Arg::CallArg:
10564switch (opgenHiddenPtrIdentity(kinds)[3]) {
10565case Arg::Tmp:
10566switch (opgenHiddenPtrIdentity(kinds)[4]) {
10567case Arg::Tmp:
10568switch (opgenHiddenPtrIdentity(kinds)[5]) {
10569case Arg::Tmp:
10570#if CPU(X86) || CPU(X86_64)
10571OPGEN_RETURN(true);
10572#endif
10573break;
10574break;
10575default:
10576break;
10577}
10578break;
10579default:
10580break;
10581}
10582break;
10583default:
10584break;
10585}
10586break;
10587default:
10588break;
10589}
10590break;
10591case Arg::Addr:
10592case Arg::Stack:
10593case Arg::CallArg:
10594switch (opgenHiddenPtrIdentity(kinds)[2]) {
10595case Arg::Imm:
10596switch (opgenHiddenPtrIdentity(kinds)[3]) {
10597case Arg::Tmp:
10598switch (opgenHiddenPtrIdentity(kinds)[4]) {
10599case Arg::Tmp:
10600switch (opgenHiddenPtrIdentity(kinds)[5]) {
10601case Arg::Tmp:
10602#if CPU(X86) || CPU(X86_64)
10603OPGEN_RETURN(true);
10604#endif
10605break;
10606break;
10607default:
10608break;
10609}
10610break;
10611default:
10612break;
10613}
10614break;
10615default:
10616break;
10617}
10618break;
10619case Arg::Tmp:
10620switch (opgenHiddenPtrIdentity(kinds)[3]) {
10621case Arg::Tmp:
10622switch (opgenHiddenPtrIdentity(kinds)[4]) {
10623case Arg::Tmp:
10624switch (opgenHiddenPtrIdentity(kinds)[5]) {
10625case Arg::Tmp:
10626#if CPU(X86) || CPU(X86_64)
10627OPGEN_RETURN(true);
10628#endif
10629break;
10630break;
10631default:
10632break;
10633}
10634break;
10635default:
10636break;
10637}
10638break;
10639default:
10640break;
10641}
10642break;
10643default:
10644break;
10645}
10646break;
10647case Arg::Index:
10648switch (opgenHiddenPtrIdentity(kinds)[2]) {
10649case Arg::Imm:
10650switch (opgenHiddenPtrIdentity(kinds)[3]) {
10651case Arg::Tmp:
10652switch (opgenHiddenPtrIdentity(kinds)[4]) {
10653case Arg::Tmp:
10654switch (opgenHiddenPtrIdentity(kinds)[5]) {
10655case Arg::Tmp:
10656#if CPU(X86) || CPU(X86_64)
10657OPGEN_RETURN(true);
10658#endif
10659break;
10660break;
10661default:
10662break;
10663}
10664break;
10665default:
10666break;
10667}
10668break;
10669default:
10670break;
10671}
10672break;
10673default:
10674break;
10675}
10676break;
10677default:
10678break;
10679}
10680break;
10681default:
10682break;
10683}
10684break;
10685default:
10686break;
10687}
10688break;
10689case Opcode::MoveDoubleConditionally64:
10690switch (sizeof...(Arguments)) {
10691case 6:
10692switch (opgenHiddenPtrIdentity(kinds)[0]) {
10693case Arg::RelCond:
10694switch (opgenHiddenPtrIdentity(kinds)[1]) {
10695case Arg::Tmp:
10696switch (opgenHiddenPtrIdentity(kinds)[2]) {
10697case Arg::Tmp:
10698switch (opgenHiddenPtrIdentity(kinds)[3]) {
10699case Arg::Tmp:
10700switch (opgenHiddenPtrIdentity(kinds)[4]) {
10701case Arg::Tmp:
10702switch (opgenHiddenPtrIdentity(kinds)[5]) {
10703case Arg::Tmp:
10704#if CPU(X86_64) || CPU(ARM64)
10705OPGEN_RETURN(true);
10706#endif
10707break;
10708break;
10709default:
10710break;
10711}
10712break;
10713default:
10714break;
10715}
10716break;
10717default:
10718break;
10719}
10720break;
10721case Arg::Imm:
10722switch (opgenHiddenPtrIdentity(kinds)[3]) {
10723case Arg::Tmp:
10724switch (opgenHiddenPtrIdentity(kinds)[4]) {
10725case Arg::Tmp:
10726switch (opgenHiddenPtrIdentity(kinds)[5]) {
10727case Arg::Tmp:
10728#if CPU(X86_64) || CPU(ARM64)
10729OPGEN_RETURN(true);
10730#endif
10731break;
10732break;
10733default:
10734break;
10735}
10736break;
10737default:
10738break;
10739}
10740break;
10741default:
10742break;
10743}
10744break;
10745case Arg::Addr:
10746case Arg::Stack:
10747case Arg::CallArg:
10748switch (opgenHiddenPtrIdentity(kinds)[3]) {
10749case Arg::Tmp:
10750switch (opgenHiddenPtrIdentity(kinds)[4]) {
10751case Arg::Tmp:
10752switch (opgenHiddenPtrIdentity(kinds)[5]) {
10753case Arg::Tmp:
10754#if CPU(X86_64)
10755OPGEN_RETURN(true);
10756#endif
10757break;
10758break;
10759default:
10760break;
10761}
10762break;
10763default:
10764break;
10765}
10766break;
10767default:
10768break;
10769}
10770break;
10771default:
10772break;
10773}
10774break;
10775case Arg::Addr:
10776case Arg::Stack:
10777case Arg::CallArg:
10778switch (opgenHiddenPtrIdentity(kinds)[2]) {
10779case Arg::Tmp:
10780switch (opgenHiddenPtrIdentity(kinds)[3]) {
10781case Arg::Tmp:
10782switch (opgenHiddenPtrIdentity(kinds)[4]) {
10783case Arg::Tmp:
10784switch (opgenHiddenPtrIdentity(kinds)[5]) {
10785case Arg::Tmp:
10786#if CPU(X86_64)
10787OPGEN_RETURN(true);
10788#endif
10789break;
10790break;
10791default:
10792break;
10793}
10794break;
10795default:
10796break;
10797}
10798break;
10799default:
10800break;
10801}
10802break;
10803case Arg::Imm:
10804switch (opgenHiddenPtrIdentity(kinds)[3]) {
10805case Arg::Tmp:
10806switch (opgenHiddenPtrIdentity(kinds)[4]) {
10807case Arg::Tmp:
10808switch (opgenHiddenPtrIdentity(kinds)[5]) {
10809case Arg::Tmp:
10810#if CPU(X86_64)
10811OPGEN_RETURN(true);
10812#endif
10813break;
10814break;
10815default:
10816break;
10817}
10818break;
10819default:
10820break;
10821}
10822break;
10823default:
10824break;
10825}
10826break;
10827default:
10828break;
10829}
10830break;
10831case Arg::Index:
10832switch (opgenHiddenPtrIdentity(kinds)[2]) {
10833case Arg::Tmp:
10834switch (opgenHiddenPtrIdentity(kinds)[3]) {
10835case Arg::Tmp:
10836switch (opgenHiddenPtrIdentity(kinds)[4]) {
10837case Arg::Tmp:
10838switch (opgenHiddenPtrIdentity(kinds)[5]) {
10839case Arg::Tmp:
10840#if CPU(X86_64)
10841OPGEN_RETURN(true);
10842#endif
10843break;
10844break;
10845default:
10846break;
10847}
10848break;
10849default:
10850break;
10851}
10852break;
10853default:
10854break;
10855}
10856break;
10857default:
10858break;
10859}
10860break;
10861default:
10862break;
10863}
10864break;
10865default:
10866break;
10867}
10868break;
10869default:
10870break;
10871}
10872break;
10873case Opcode::MoveDoubleConditionallyTest32:
10874switch (sizeof...(Arguments)) {
10875case 6:
10876switch (opgenHiddenPtrIdentity(kinds)[0]) {
10877case Arg::ResCond:
10878switch (opgenHiddenPtrIdentity(kinds)[1]) {
10879case Arg::Tmp:
10880switch (opgenHiddenPtrIdentity(kinds)[2]) {
10881case Arg::Tmp:
10882switch (opgenHiddenPtrIdentity(kinds)[3]) {
10883case Arg::Tmp:
10884switch (opgenHiddenPtrIdentity(kinds)[4]) {
10885case Arg::Tmp:
10886switch (opgenHiddenPtrIdentity(kinds)[5]) {
10887case Arg::Tmp:
10888OPGEN_RETURN(true);
10889break;
10890break;
10891default:
10892break;
10893}
10894break;
10895default:
10896break;
10897}
10898break;
10899default:
10900break;
10901}
10902break;
10903case Arg::BitImm:
10904switch (opgenHiddenPtrIdentity(kinds)[3]) {
10905case Arg::Tmp:
10906switch (opgenHiddenPtrIdentity(kinds)[4]) {
10907case Arg::Tmp:
10908switch (opgenHiddenPtrIdentity(kinds)[5]) {
10909case Arg::Tmp:
10910OPGEN_RETURN(true);
10911break;
10912break;
10913default:
10914break;
10915}
10916break;
10917default:
10918break;
10919}
10920break;
10921default:
10922break;
10923}
10924break;
10925default:
10926break;
10927}
10928break;
10929case Arg::Addr:
10930case Arg::Stack:
10931case Arg::CallArg:
10932switch (opgenHiddenPtrIdentity(kinds)[2]) {
10933case Arg::Imm:
10934switch (opgenHiddenPtrIdentity(kinds)[3]) {
10935case Arg::Tmp:
10936switch (opgenHiddenPtrIdentity(kinds)[4]) {
10937case Arg::Tmp:
10938switch (opgenHiddenPtrIdentity(kinds)[5]) {
10939case Arg::Tmp:
10940#if CPU(X86) || CPU(X86_64)
10941OPGEN_RETURN(true);
10942#endif
10943break;
10944break;
10945default:
10946break;
10947}
10948break;
10949default:
10950break;
10951}
10952break;
10953default:
10954break;
10955}
10956break;
10957default:
10958break;
10959}
10960break;
10961case Arg::Index:
10962switch (opgenHiddenPtrIdentity(kinds)[2]) {
10963case Arg::Imm:
10964switch (opgenHiddenPtrIdentity(kinds)[3]) {
10965case Arg::Tmp:
10966switch (opgenHiddenPtrIdentity(kinds)[4]) {
10967case Arg::Tmp:
10968switch (opgenHiddenPtrIdentity(kinds)[5]) {
10969case Arg::Tmp:
10970#if CPU(X86) || CPU(X86_64)
10971OPGEN_RETURN(true);
10972#endif
10973break;
10974break;
10975default:
10976break;
10977}
10978break;
10979default:
10980break;
10981}
10982break;
10983default:
10984break;
10985}
10986break;
10987default:
10988break;
10989}
10990break;
10991default:
10992break;
10993}
10994break;
10995default:
10996break;
10997}
10998break;
10999default:
11000break;
11001}
11002break;
11003case Opcode::MoveDoubleConditionallyTest64:
11004switch (sizeof...(Arguments)) {
11005case 6:
11006switch (opgenHiddenPtrIdentity(kinds)[0]) {
11007case Arg::ResCond:
11008switch (opgenHiddenPtrIdentity(kinds)[1]) {
11009case Arg::Tmp:
11010switch (opgenHiddenPtrIdentity(kinds)[2]) {
11011case Arg::Tmp:
11012switch (opgenHiddenPtrIdentity(kinds)[3]) {
11013case Arg::Tmp:
11014switch (opgenHiddenPtrIdentity(kinds)[4]) {
11015case Arg::Tmp:
11016switch (opgenHiddenPtrIdentity(kinds)[5]) {
11017case Arg::Tmp:
11018#if CPU(X86_64) || CPU(ARM64)
11019OPGEN_RETURN(true);
11020#endif
11021break;
11022break;
11023default:
11024break;
11025}
11026break;
11027default:
11028break;
11029}
11030break;
11031default:
11032break;
11033}
11034break;
11035case Arg::Imm:
11036switch (opgenHiddenPtrIdentity(kinds)[3]) {
11037case Arg::Tmp:
11038switch (opgenHiddenPtrIdentity(kinds)[4]) {
11039case Arg::Tmp:
11040switch (opgenHiddenPtrIdentity(kinds)[5]) {
11041case Arg::Tmp:
11042#if CPU(X86_64)
11043OPGEN_RETURN(true);
11044#endif
11045break;
11046break;
11047default:
11048break;
11049}
11050break;
11051default:
11052break;
11053}
11054break;
11055default:
11056break;
11057}
11058break;
11059default:
11060break;
11061}
11062break;
11063case Arg::Addr:
11064case Arg::Stack:
11065case Arg::CallArg:
11066switch (opgenHiddenPtrIdentity(kinds)[2]) {
11067case Arg::Imm:
11068switch (opgenHiddenPtrIdentity(kinds)[3]) {
11069case Arg::Tmp:
11070switch (opgenHiddenPtrIdentity(kinds)[4]) {
11071case Arg::Tmp:
11072switch (opgenHiddenPtrIdentity(kinds)[5]) {
11073case Arg::Tmp:
11074#if CPU(X86_64)
11075OPGEN_RETURN(true);
11076#endif
11077break;
11078break;
11079default:
11080break;
11081}
11082break;
11083default:
11084break;
11085}
11086break;
11087default:
11088break;
11089}
11090break;
11091case Arg::Tmp:
11092switch (opgenHiddenPtrIdentity(kinds)[3]) {
11093case Arg::Tmp:
11094switch (opgenHiddenPtrIdentity(kinds)[4]) {
11095case Arg::Tmp:
11096switch (opgenHiddenPtrIdentity(kinds)[5]) {
11097case Arg::Tmp:
11098#if CPU(X86_64)
11099OPGEN_RETURN(true);
11100#endif
11101break;
11102break;
11103default:
11104break;
11105}
11106break;
11107default:
11108break;
11109}
11110break;
11111default:
11112break;
11113}
11114break;
11115default:
11116break;
11117}
11118break;
11119case Arg::Index:
11120switch (opgenHiddenPtrIdentity(kinds)[2]) {
11121case Arg::Imm:
11122switch (opgenHiddenPtrIdentity(kinds)[3]) {
11123case Arg::Tmp:
11124switch (opgenHiddenPtrIdentity(kinds)[4]) {
11125case Arg::Tmp:
11126switch (opgenHiddenPtrIdentity(kinds)[5]) {
11127case Arg::Tmp:
11128#if CPU(X86_64)
11129OPGEN_RETURN(true);
11130#endif
11131break;
11132break;
11133default:
11134break;
11135}
11136break;
11137default:
11138break;
11139}
11140break;
11141default:
11142break;
11143}
11144break;
11145default:
11146break;
11147}
11148break;
11149default:
11150break;
11151}
11152break;
11153default:
11154break;
11155}
11156break;
11157default:
11158break;
11159}
11160break;
11161case Opcode::MoveDoubleConditionallyDouble:
11162switch (sizeof...(Arguments)) {
11163case 6:
11164switch (opgenHiddenPtrIdentity(kinds)[0]) {
11165case Arg::DoubleCond:
11166switch (opgenHiddenPtrIdentity(kinds)[1]) {
11167case Arg::Tmp:
11168switch (opgenHiddenPtrIdentity(kinds)[2]) {
11169case Arg::Tmp:
11170switch (opgenHiddenPtrIdentity(kinds)[3]) {
11171case Arg::Tmp:
11172switch (opgenHiddenPtrIdentity(kinds)[4]) {
11173case Arg::Tmp:
11174switch (opgenHiddenPtrIdentity(kinds)[5]) {
11175case Arg::Tmp:
11176OPGEN_RETURN(true);
11177break;
11178break;
11179default:
11180break;
11181}
11182break;
11183default:
11184break;
11185}
11186break;
11187default:
11188break;
11189}
11190break;
11191default:
11192break;
11193}
11194break;
11195default:
11196break;
11197}
11198break;
11199default:
11200break;
11201}
11202break;
11203default:
11204break;
11205}
11206break;
11207case Opcode::MoveDoubleConditionallyFloat:
11208switch (sizeof...(Arguments)) {
11209case 6:
11210switch (opgenHiddenPtrIdentity(kinds)[0]) {
11211case Arg::DoubleCond:
11212switch (opgenHiddenPtrIdentity(kinds)[1]) {
11213case Arg::Tmp:
11214switch (opgenHiddenPtrIdentity(kinds)[2]) {
11215case Arg::Tmp:
11216switch (opgenHiddenPtrIdentity(kinds)[3]) {
11217case Arg::Tmp:
11218switch (opgenHiddenPtrIdentity(kinds)[4]) {
11219case Arg::Tmp:
11220switch (opgenHiddenPtrIdentity(kinds)[5]) {
11221case Arg::Tmp:
11222OPGEN_RETURN(true);
11223break;
11224break;
11225default:
11226break;
11227}
11228break;
11229default:
11230break;
11231}
11232break;
11233default:
11234break;
11235}
11236break;
11237default:
11238break;
11239}
11240break;
11241default:
11242break;
11243}
11244break;
11245default:
11246break;
11247}
11248break;
11249default:
11250break;
11251}
11252break;
11253case Opcode::MemoryFence:
11254switch (sizeof...(Arguments)) {
11255case 0:
11256OPGEN_RETURN(true);
11257break;
11258break;
11259default:
11260break;
11261}
11262break;
11263case Opcode::StoreFence:
11264switch (sizeof...(Arguments)) {
11265case 0:
11266OPGEN_RETURN(true);
11267break;
11268break;
11269default:
11270break;
11271}
11272break;
11273case Opcode::LoadFence:
11274switch (sizeof...(Arguments)) {
11275case 0:
11276OPGEN_RETURN(true);
11277break;
11278break;
11279default:
11280break;
11281}
11282break;
11283case Opcode::Jump:
11284switch (sizeof...(Arguments)) {
11285case 0:
11286OPGEN_RETURN(true);
11287break;
11288break;
11289default:
11290break;
11291}
11292break;
11293case Opcode::RetVoid:
11294switch (sizeof...(Arguments)) {
11295case 0:
11296OPGEN_RETURN(true);
11297break;
11298break;
11299default:
11300break;
11301}
11302break;
11303case Opcode::Ret32:
11304switch (sizeof...(Arguments)) {
11305case 1:
11306switch (opgenHiddenPtrIdentity(kinds)[0]) {
11307case Arg::Tmp:
11308OPGEN_RETURN(true);
11309break;
11310break;
11311default:
11312break;
11313}
11314break;
11315default:
11316break;
11317}
11318break;
11319case Opcode::Ret64:
11320switch (sizeof...(Arguments)) {
11321case 1:
11322switch (opgenHiddenPtrIdentity(kinds)[0]) {
11323case Arg::Tmp:
11324#if CPU(X86_64) || CPU(ARM64)
11325OPGEN_RETURN(true);
11326#endif
11327break;
11328break;
11329default:
11330break;
11331}
11332break;
11333default:
11334break;
11335}
11336break;
11337case Opcode::RetFloat:
11338switch (sizeof...(Arguments)) {
11339case 1:
11340switch (opgenHiddenPtrIdentity(kinds)[0]) {
11341case Arg::Tmp:
11342OPGEN_RETURN(true);
11343break;
11344break;
11345default:
11346break;
11347}
11348break;
11349default:
11350break;
11351}
11352break;
11353case Opcode::RetDouble:
11354switch (sizeof...(Arguments)) {
11355case 1:
11356switch (opgenHiddenPtrIdentity(kinds)[0]) {
11357case Arg::Tmp:
11358OPGEN_RETURN(true);
11359break;
11360break;
11361default:
11362break;
11363}
11364break;
11365default:
11366break;
11367}
11368break;
11369case Opcode::Oops:
11370switch (sizeof...(Arguments)) {
11371case 0:
11372OPGEN_RETURN(true);
11373break;
11374break;
11375default:
11376break;
11377}
11378break;
11379case Opcode::EntrySwitch:
11380OPGEN_RETURN(EntrySwitchCustom::isValidFormStatic(arguments...));
11381break;
11382case Opcode::Shuffle:
11383OPGEN_RETURN(ShuffleCustom::isValidFormStatic(arguments...));
11384break;
11385case Opcode::Patch:
11386OPGEN_RETURN(PatchCustom::isValidFormStatic(arguments...));
11387break;
11388case Opcode::CCall:
11389OPGEN_RETURN(CCallCustom::isValidFormStatic(arguments...));
11390break;
11391case Opcode::ColdCCall:
11392OPGEN_RETURN(ColdCCallCustom::isValidFormStatic(arguments...));
11393break;
11394case Opcode::WasmBoundsCheck:
11395OPGEN_RETURN(WasmBoundsCheckCustom::isValidFormStatic(arguments...));
11396break;
11397default:
11398break;
11399}
11400return false;
11401}
11402inline bool isDefinitelyTerminal(Opcode opcode)
11403{
11404switch (opcode) {
11405case Opcode::BranchAtomicStrongCAS8:
11406case Opcode::BranchAtomicStrongCAS16:
11407case Opcode::BranchAtomicStrongCAS32:
11408case Opcode::BranchAtomicStrongCAS64:
11409case Opcode::Branch8:
11410case Opcode::Branch32:
11411case Opcode::Branch64:
11412case Opcode::BranchTest8:
11413case Opcode::BranchTest32:
11414case Opcode::BranchTest64:
11415case Opcode::BranchDouble:
11416case Opcode::BranchFloat:
11417case Opcode::BranchAdd32:
11418case Opcode::BranchAdd64:
11419case Opcode::BranchMul32:
11420case Opcode::BranchMul64:
11421case Opcode::BranchSub32:
11422case Opcode::BranchSub64:
11423case Opcode::BranchNeg32:
11424case Opcode::BranchNeg64:
11425case Opcode::Jump:
11426case Opcode::RetVoid:
11427case Opcode::Ret32:
11428case Opcode::Ret64:
11429case Opcode::RetFloat:
11430case Opcode::RetDouble:
11431case Opcode::Oops:
11432return true;
11433default:
11434return false;
11435}
11436}
11437inline bool isReturn(Opcode opcode)
11438{
11439switch (opcode) {
11440case Opcode::RetVoid:
11441case Opcode::Ret32:
11442case Opcode::Ret64:
11443case Opcode::RetFloat:
11444case Opcode::RetDouble:
11445return true;
11446default:
11447return false;
11448}
11449}
11450} } } // namespace JSC::B3::Air
11451#endif // AirOpcodeUtils_h
11452