1 | /* |
2 | * Copyright (C) 2012-2019 Apple Inc. All rights reserved. |
3 | * |
4 | * Redistribution and use in source and binary forms, with or without |
5 | * modification, are permitted provided that the following conditions |
6 | * are met: |
7 | * 1. Redistributions of source code must retain the above copyright |
8 | * notice, this list of conditions and the following disclaimer. |
9 | * 2. Redistributions in binary form must reproduce the above copyright |
10 | * notice, this list of conditions and the following disclaimer in the |
11 | * documentation and/or other materials provided with the distribution. |
12 | * |
13 | * THIS SOFTWARE IS PROVIDED BY APPLE INC. ``AS IS'' AND ANY |
14 | * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
15 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
16 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL APPLE INC. OR |
17 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, |
18 | * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, |
19 | * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR |
20 | * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY |
21 | * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
22 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
23 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
24 | */ |
25 | |
26 | #pragma once |
27 | |
28 | #include "LLIntCommon.h" |
29 | #include <wtf/Assertions.h> |
30 | #include <wtf/Gigacage.h> |
31 | |
32 | #if ENABLE(C_LOOP) |
33 | #if !OS(WINDOWS) |
34 | #define OFFLINE_ASM_C_LOOP 1 |
35 | #define OFFLINE_ASM_C_LOOP_WIN 0 |
36 | #else |
37 | #define OFFLINE_ASM_C_LOOP 0 |
38 | #define OFFLINE_ASM_C_LOOP_WIN 1 |
39 | #endif |
40 | #define OFFLINE_ASM_X86 0 |
41 | #define OFFLINE_ASM_X86_WIN 0 |
42 | #define OFFLINE_ASM_ARMv7 0 |
43 | #define OFFLINE_ASM_ARM64 0 |
44 | #define OFFLINE_ASM_ARM64E 0 |
45 | #define OFFLINE_ASM_X86_64 0 |
46 | #define OFFLINE_ASM_X86_64_WIN 0 |
47 | #define OFFLINE_ASM_ARMv7k 0 |
48 | #define OFFLINE_ASM_ARMv7s 0 |
49 | #define OFFLINE_ASM_MIPS 0 |
50 | |
51 | #else // ENABLE(C_LOOP) |
52 | |
53 | #define OFFLINE_ASM_C_LOOP 0 |
54 | #define OFFLINE_ASM_C_LOOP_WIN 0 |
55 | |
56 | #if CPU(X86) && !COMPILER(MSVC) |
57 | #define OFFLINE_ASM_X86 1 |
58 | #else |
59 | #define OFFLINE_ASM_X86 0 |
60 | #endif |
61 | |
62 | #if CPU(X86) && COMPILER(MSVC) |
63 | #define OFFLINE_ASM_X86_WIN 1 |
64 | #else |
65 | #define OFFLINE_ASM_X86_WIN 0 |
66 | #endif |
67 | |
68 | #ifdef __ARM_ARCH_7K__ |
69 | #define OFFLINE_ASM_ARMv7k 1 |
70 | #else |
71 | #define OFFLINE_ASM_ARMv7k 0 |
72 | #endif |
73 | |
74 | #ifdef __ARM_ARCH_7S__ |
75 | #define OFFLINE_ASM_ARMv7s 1 |
76 | #else |
77 | #define OFFLINE_ASM_ARMv7s 0 |
78 | #endif |
79 | |
80 | #if CPU(ARM_THUMB2) |
81 | #define OFFLINE_ASM_ARMv7 1 |
82 | #else |
83 | #define OFFLINE_ASM_ARMv7 0 |
84 | #endif |
85 | |
86 | #if CPU(X86_64) && !COMPILER(MSVC) |
87 | #define OFFLINE_ASM_X86_64 1 |
88 | #else |
89 | #define OFFLINE_ASM_X86_64 0 |
90 | #endif |
91 | |
92 | #if CPU(X86_64) && COMPILER(MSVC) |
93 | #define OFFLINE_ASM_X86_64_WIN 1 |
94 | #else |
95 | #define OFFLINE_ASM_X86_64_WIN 0 |
96 | #endif |
97 | |
98 | #if CPU(MIPS) |
99 | #define OFFLINE_ASM_MIPS 1 |
100 | #else |
101 | #define OFFLINE_ASM_MIPS 0 |
102 | #endif |
103 | |
104 | #if CPU(ARM64) |
105 | #define OFFLINE_ASM_ARM64 1 |
106 | #else |
107 | #define OFFLINE_ASM_ARM64 0 |
108 | #endif |
109 | |
110 | #if CPU(ARM64E) |
111 | #define OFFLINE_ASM_ARM64E 1 |
112 | #undef OFFLINE_ASM_ARM64 |
113 | #define OFFLINE_ASM_ARM64 0 // Pretend that ARM64 and ARM64E are mutually exclusive to please the offlineasm. |
114 | #else |
115 | #define OFFLINE_ASM_ARM64E 0 |
116 | #endif |
117 | |
118 | #if CPU(MIPS) |
119 | #ifdef WTF_MIPS_PIC |
120 | #define S(x) #x |
121 | #define SX(x) S(x) |
122 | #define OFFLINE_ASM_CPLOAD(reg) \ |
123 | ".set noreorder\n" \ |
124 | ".cpload " SX(reg) "\n" \ |
125 | ".set reorder\n" |
126 | #else |
127 | #define OFFLINE_ASM_CPLOAD(reg) |
128 | #endif |
129 | #endif |
130 | |
131 | #endif // ENABLE(C_LOOP) |
132 | |
133 | #if USE(JSVALUE64) |
134 | #define OFFLINE_ASM_JSVALUE64 1 |
135 | #else |
136 | #define OFFLINE_ASM_JSVALUE64 0 |
137 | #endif |
138 | |
139 | #if CPU(ADDRESS64) |
140 | #define OFFLINE_ASM_ADDRESS64 1 |
141 | #else |
142 | #define OFFLINE_ASM_ADDRESS64 0 |
143 | #endif |
144 | |
145 | #if !ASSERT_DISABLED |
146 | #define OFFLINE_ASM_ASSERT_ENABLED 1 |
147 | #else |
148 | #define OFFLINE_ASM_ASSERT_ENABLED 0 |
149 | #endif |
150 | |
151 | #if LLINT_TRACING |
152 | #define OFFLINE_ASM_TRACING 1 |
153 | #else |
154 | #define OFFLINE_ASM_TRACING 0 |
155 | #endif |
156 | |
157 | #define OFFLINE_ASM_GIGACAGE_ENABLED GIGACAGE_ENABLED |
158 | |
159 | #if ENABLE(WEBASSEMBLY) |
160 | #define OFFLINE_ASM_WEBASSEMBLY 1 |
161 | #else |
162 | #define OFFLINE_ASM_WEBASSEMBLY 0 |
163 | #endif |
164 | |
165 | #if HAVE(FAST_TLS) |
166 | #define OFFLINE_ASM_HAVE_FAST_TLS 1 |
167 | #else |
168 | #define OFFLINE_ASM_HAVE_FAST_TLS 0 |
169 | #endif |
170 | |